MoSys launches GigaChip Alliance for serial chip-to-chip communications

SUNNYVALE, USA: MoSys Inc., a leading provider of differentiated high-density memory and high-speed interface (I/O) intellectual property (IP), announced the launch of the GigaChip Alliance, an ecosystem of semiconductor device suppliers in support of the GigaChip Interface.

The founding alliance participants are: MoSys, Altera Corporation and NetLogic Microsystems.

The GigaChip Interface is a board-level, open, CEI-11 compatible interface developed to enable highly efficient serial chip-to-chip communications in next generation high-performance networking, computing and storage systems.

In February 2010, MoSys announced the GigaChip Interface as a key element of the new Bandwidth Engine family of ICs. Through the GigaChip Alliance, participating companies will collaborate on expanding the GigaChip Interface for high-speed serial chip-to-chip applications and developing industry-wide open interoperability standards and tools to accelerate the adoption of serial chip-to-chip based system designs.

The GigaChip Interface is a short-reach, low-power serial interface, which enables highly efficient, high-bandwidth, low-latency performance not achievable using currently available serial protocols. Similar to the fundamental performance breakthrough achieved by the move to double data rate (DDR) style interfaces in the late ‘90s, we believe the GigaChip Interface represents the next breakthrough in chip-to-chip communications using differential SerDes technology.

A 16-lane GigaChip Interface can replace up to six separate DDR3 parallel interface busses to memory, which represents a bandwidth density performance increase of 4 times, while reducing system power and interface costs by 2 to 3 times. Such bandwidth density increases will be required to realize line cards with aggregate throughput beyond 100G, a necessity in future high end networking systems.

The GigaChip Interface has adopted the open CEI-11 electrical transport standard making use of this existing electrical ecosystem in order to shorten time to market for the introduction of next generation system designs. Through the GigaChip Alliance, companies are enabling an entirely new class of low-cost, high-speed, high-performance systems in networking, computing and storage markets.

“As a leading semiconductor provider to the communications market, we welcome the performance and efficiency that the GigaChip Interface will provide our FPGA customers,” commented Arun Iyengar, Senior Director, Communications Business Unit of Altera. "We are pleased to join the GigaChip Alliance so that we can help drive the evolution of serial chip-to-chip communications technologies, and we plan to support the GigaChip Interface in our FPGAs."

“NetLogic is a worldwide leader in intelligent semiconductor solutions that are powering next-generation internet networks,” said Chris O’Reilly, VP of Marketing at NetLogic Microsystems. “The GigaChip Alliance is helping to address an important system-level need for a high-bandwidth low-latency interface. We are pleased to collaborate with MoSys as a participant in the GigaChip Alliance."

"We couldn't be more pleased to have such prestigious alliance partners supporting the proliferation of the GigaChip Interface into next generation networking systems,” stated David DeMaria, Vice President of Business Operations for MoSys.

“Our goal is to revolutionize serial chip-to-chip communications with the GigaChip Interface. Towards that end, we are making the GigaChip Interface an open protocol and encouraging widespread use by potential partners and customers. The GigaChip Alliance will facilitate industry-wide adoption and evolution of this protocol.”