USA: Toshiba America Electronic Components Inc. (TAEC), a committed leader that collaborates with technology companies to create breakthrough designs, announced the availability of a new Metal-Configurable Standard Cell (MCSC) platform SoC.
The platform SoC employs an innovative MCSC architecture that speeds ASIC development for faster time-to-market at lower non-recurring engineering (NRE) costs, and enables footprint-compatible, low-cost FPGA replacement, and configurable and reusable platforms for standard product development.
"This powerful platform technology completely changes the development landscape for next- generation SoCs by providing a viable alternative to high-cost, high-power FPGAs, or for traditional ASICs and ASSPs by significantly reducing the fixed-mask costs and time to volume," says Saba Sharifi, VP of the Logic LSI Business Unit, System LSI Group at TAEC.
"It is an ideal solution for customers who need to deliver products that require customization, may have smaller volume requirements compared to traditional ASICs, need to make more frequent changes, or want to develop a platform family of products to address multiple market segments while avoiding large mask costs."
With the TAEC platform SoC, customers can rapidly create ASICs or ASSPs by minimizing customizable mask layers. The product uses 65nm process technology with 40nm and smaller processes in development. The 65nm process supports up to 30 million raw gates, 20 Mbits DP memories, and up to 1200 I/Os.
Monday, March 11, 2013
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