Sidense qualifies 1T-OTP NVM for MagnaChip 180nm mixed-signal and HV CMOS process

CANADA, KOREA & USA: MagnaChip Semiconductor Corp., a Korea-based designer and manufacturer of analog and mixed-signal semiconductor products, and Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) one-time programmable (OTP) memory IP cores announced that Sidense's SLP 1T-OTP macros have been fully qualified for MagnaChip's 180nm 1.8/3.3/18V high voltage CMOS and mixed-signal process.

Semiconductor devices fabricated in these processes are used in applications such as LED lighting controllers, display controllers and power-management ICs (PMICs) for mobile and other high-volume applications.

"Leading semiconductor device manufacturers are already using Sidense 1T-OTP macros for LED energy management solutions fabricated using MagnaChip's leading process technology," stated Tom Schild, Sidense's VP of Worldwide Sales and Marketing. "By offering our very dense and low-power SLP memory macros in MagnaChip's HV process, customers have a proven platform in which they can take full advantage of the benefits of 1T-OTP memory and its cost-effectiveness, reliability and security advantages over eFuse, mask ROM and other NVM technologies."

"Qualifying Sidense's SLP 1T-OTP memory macros in our high-voltage and mixed-signal processes with high performance analog devices such as low noise and multi Vt transistors allows us to provide our key customers with significant benefits in performance and die area savings as well as long term reliability at high temperatures," said Namkyu Park, senior VP of Marketing for MagnaChip's Semiconductor Manufacturing Services Division.

"By using MagnaChip's specialized process technology with Sidense's reliable and cost-effective non-volatile memory macros, customers can bring to market products that offer distinct advantages over those of their competitors having flexible analog trimming and/or control program storage."