Mentor Graphics transforms SoC integration and functional verification with next gen Questa platform

WILSONVILLE, USA: Mentor Graphics Corp. announced that it has embarked on a corporate-wide strategy aimed at transforming the integration and functional verification of complex System on Chip (SoC) designs. The strategy targets both near-term and long-range challenges with a blend of tools and methodologies that span the efforts of conventional ESL and RTL functions.

In the initial phase of the strategy, the Questa verification platform has been expanded into three simulation platforms – Questa Core, Questa Prime and Questa Ultra. The new flagship product, Questa Ultra, delivers an unprecedented 10X improvement in time to coverage. Integrating simulation with intelligent testbench automation, Questa Ultra eliminates redundancy in randomized testbenches—dramatically reducing the amount of time and workstation resources required to hit coverage targets.

“Mentor is committed to the goal of bringing transformation and measurable change to the design and verification of complex SoCs. Our ongoing work in testbench automation, advanced verification methodologies and integrated approaches to debug and verification management has turned into state-of-the art products,” said John Lenyo, general manager of the Design Verification Technology division of Mentor Graphics. “With the new Questa verification platform, we’ve delivered a major leap forward in verification productivity.”

Three solutions to match designers’ needs
The Questa Core product is targeted at designers who need high-performance simulation and access to assertion-based verification. The Questa Core version provides support for standard RTL languages along with SystemVerilog assertions and PSL assertions, advanced code coverage and integrated debug.

The Questa Prime product includes all the functionality of the Questa Core version and adds support for functional coverage, full OVM/UVM and SystemVerilog support for testbench creation and implementation as well as full verification management capabilities.

The Questa Ultra product further extends the Questa Prime version to include UPF support for power aware simulation and verification, along with integrated intelligent testbench automation.

Platform functions add to efficiency and productivity
The Questa verification platform includes a robust set of technologies that enhance flow development and data analysis. The Questa platform’s industry-leading Unified Coverage Database (UCDB) now centralizes the data collection for all the Questa platform technologies including simulation, formal and CDC.

The Questa platform’s Verification Management feature delivers analysis and reports on all aspects of the verification process. Using Verification Management capabilities, designers can find bugs faster, analyze coverage to reduce regression times, optimize the execution of their simulation farms and more.

Integration with virtual prototyping and acceleration
The Questa verification platform also works seamlessly with the rest of the Mentor SoC solutions. The Vista virtual prototyping solution can be used to generate TLM models that easily run in the Questa environment. The Veloce Testbench Express solution enables designers to write testbenches that can run unchanged in a Questa simulator and Veloce emulator.