PALO ALTO, USA: ChipStart LLC, a semiconductor intellectual property solution company, announced that it has selected S2C, Inc. as a target vendor for prototyping and low volume deployment of ChipStart’s SSM SoC System Manager.
Today’s SoCs often include multiple processors and other high functionality hardware blocks supplied by multiple internal and external sources. Each one of these blocks has unique system management requirements, such as reset and boot sequencing, as well as power and security management. SSM enables system management functions to be abstracted and centrally controlled using software.
The SSM controller accepts software based command sequences in real time and communicates with each of the IP blocks via a simple SSM bus. This bus is represented as a ring, is easy to implement, and can operate across multiple clock domains. A small SSM register block is connected to each IP block to facilitate mapping the software based commands into specific signal transitions communicated to each of the hardware blocks over the SSM bus.
“For certain applications, such as communications appliances, personalizing the SoC happens more frequently and this can cause a lot of design and test complexity at the system level. In these cases there are economic advantages to having a small FPGA next to the SoC which hosts the SSM controller, rather than incorporating the entire SSM architecture into the SoC,” said Howard Pakosh, president and CEO ChipStart LLC. “Certainly this is the case when prototyping systems management schemes for the first time, but this solution can also offer more flexibility for real time personalization of several ASICs at the board level after the appliances have been shipped into the field.”
ChipStart is offering SSM on the S2C Single Virtex-5 110 TAI Logic Module. This logic module is designed for rapid SoC/ASIC prototyping and can hold designs with up to 1.1M ASIC gates. This design can be ported to higher capacity S2C prototyping boards.
“Combining IP subsystems such a SSM with flexible prototyping vehicles such as Virtex-5 not only accelerates architecture development but also delivers the predictable system behavior early in the SoC design cycle that shaves months off of a typical time to market schedule. By controlling the system state transitions using a software scheme, developing and debugging software on the target hardware is much more efficient than traditional approaches,” said Toshio Nakama, CEO of S2C.
SoC System Management is rapidly becoming one of the most difficult and expensive design challenges for SoC developers. The proliferation of applications, such as Facebook, Twitter, and YouTube across appliances has re-oriented user expectations of having the same experience across all their appliances, whether it be a cell phone, Internet TV, laptop or tablet computers. As a result, SoC developers are now faced with the challenge of building SoC “platforms” that must comprehend uniform user experience requirements, even if their target SoC is vertically aligned.
“The dynamics of a consistent user experience anywhere and on any appliance means that SoCs targeted for a specific appliance must in some way comprehend how the application will be executed on other appliances,” said Rich Wawryzniak, Senior Analyst, Semico Research. “Adding personalization through real time programmability into the SoC is now a necessity, and incorporating subsystem IP SoC methodologies that includes SoC system management delivers superior business economics.”
SSM is the only merchant SoC Subsystem Management IP available today. SSM provides power and security management, error recovery, boot and reset sequencing, using a software-based sequencing methodology that is effective for normal operation sequences and exception handling and can transition as the applications are selected by the end user.