HONG KONG: National Semiconductor Corp. has introduced a new family of clock jitter cleaners featuring the industry’s lowest phase noise and rms jitter performance: 111 femtosecond (fs) from 12 kHz to 20 MHz, and a wideband noise floor of -162 dBc/Hz at 184 MHz output frequency. This level of phase noise enhances the performance of systems used in wireless and wired communications, test and measurement, medical imaging, software defined radio (SDR) and digital broadcast applications, while reducing overall bill of materials (BOM) cost.
The LMK04800 family is comprised of four integrated circuits (ICs) including the LMK04808, LMK04806, LMK04805 and LMK04803, and is optimized for generating different frequencies up to 1.5 GHz for clocking ADCs, DACs, SerDes and FPGAs. With integrated features such as holdover, switchover, multiple inputs, digital delay, analog delay, odd/even dividers and 12 programmable output format drivers, the LMK04800 ICs are highly flexible and configurable to support a variety of different architectures – all while reducing the number of components and design effort traditionally required to implement these functions.
This unique combination of performance and functional integration reduces clock architecture complexity and provides design engineers with multiple options to tradeoff system performance, component count and cost. The LMK04800 clock jitter cleaners combine with National's high-speed op amps and ADCs (LMH6554, LMH6517, ADC12D1600, ADC12D1000, and ADC16DV160) to provide a complete signal-path system solution.