TAIPEI, TAIWAN: Cadence Design Systems Inc. announced that Silicon Integrated System (SiS), a worldwide leader in logic products, has adopted Cadence solutions for its PC peripheral and multimedia system on chip (SoC) designs. SiS chose Cadence to improve automation and further optimize its product development flow in order to boost productivity and manage profitability.
Cadence now provides SiS with a complete digital design-to-signoff methodology for exploring new power-saving strategies and accommodating unique SoC designs. The technologies and methodologies adopted include a full digital flow from logic design to implementation, custom/analog flow, verification flow, and power-saving, power-aware automation capabilities across the entire design.
To meet power-saving requirements for the DTV and multimedia SoC chip design, SiS used Encounter Conformal Low Power for advanced low-power verification, Encounter Digial Implementation System for full-chip implementation, Encounter Power System for accelerating complete power optimization, Encounter RTL Compiler for production-proven synthesis, and Encounter Timing System for high-quality timing analysis.
Additionally, this new broader adoption includes Virtuoso Accelerated Parallel Simulator—part of the Virtuoso Multi-Mode Simulation suite of simulators—to provide fast, and accurate simulation for complex analog, RF and mixed-signal designs.
SiS was particularly impressed with the broad Cadence verification IP portfolio, which includes verification IP for USB-based designs, including USB 3.0 with Compliance Management System, a metric-based approach that uniquely automates protocol compliance verification. SiS adopted the verification IP as an integrated element of the overall Cadence metric-driven verification methodology and technology, aimed at providing cost-effective, zero-defect verification closure.
“As a high-quality DTVand multimedia SoC chip designer, SiS not only provides better designs to customers at the shortest lead time, but also offers outstanding service and support,” said Nelson Lee, Marketing senior director at SiS.
“With Cadence we anticipate greater productivity through enhanced efficiency and fewer iterations, as well as an increased focus on profitability through faster time to market. This relationship will continue to be a crucial element in achieving our performance goals of high-quality technical innovation and customer service.”
“Cadence provides comprehensive solutions that enhance productivity and profitability for our customers who need to deliver high-quality products under shrinking schedule pressures,” said Willis Chang, Country Manager of Taiwan at Cadence. “We look forward to working with SiS as they continue to improve their development process and achieve breakthrough results in design quality and product competitiveness.”
Thursday, July 1, 2010
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