Wednesday, June 5, 2013

Atrenta ships 5.1 release of SpyGlass platform

USA: Atrenta Inc. announced the 5.1 release of the SpyGlass and GenSys platforms.

The release contains significant usability improvement and enhancements to address complexity, size and performance challenges for the next wave of SoC designs. The release also offers unique new capabilities enabled by the integration of technologies from SpyGlass for static analysis, BugScope for dynamic verification and GenSys for design exploration.

A key focus of the release is to enhance the user experience. Several new enhancements are now available in Atrenta Console, the graphical user interface, including an intuitive layout with expanded space for debug, message grouping and filtering, and the ability to trace signal drivers across multiple hierarchies.

SpyGlass reports now leverage the power of HTML navigation with a top level landing page that allows easy navigation to all the relevant reports for the project. These are also linked to the Atrenta DashBoard allowing complete traceability of results from project managers all the way to the engineer responsible for a design block. Several key enhancements are available in the SpyGlass Tcl shell for design read and setup, design and results query, and customized reporting.

The hierarchical SoC abstraction flow, now available for multiple SpyGlass technologies, is significantly enhanced for usability, especially in the handling of mismatches between block and SoC level assumptions. This unique flow provides an order of magnitude improvement in run time, memory footprint and noise when applied to large SoC designs and is the only way to scale for the next wave of billion gate designs.

No comments:

Post a Comment

Note: Only a member of this blog may post a comment.