USA: eSilicon Corp., the largest independent semiconductor design and manufacturing services provider, and GlobalFoundries used concurrent design and emerging SoC packaging technology to deliver QuickLogic Corporation's ArcticLink III family of display bridges under extreme market window pressure.
QuickLogic had identified an opportunity for a high-volume, low-power, low-cost display-bridging solution. Hitting a narrow market window required working with semiconductor development partners with the capabilities to deliver QuickLogic's family of devices within power, size and cost constraints, including: physical design, package design, foundry execution and concurrent package design methodology.
eSilicon's package design team determined that a fan-out wafer-level chip-scale package (FOWLCSP) would address the size, power, and cost constraints and provide the following advantages:
* Smaller form factor.
* Better electrical and thermal dissipation.
* Reduced cost due to denser I/Os and less aggressive foundry rules.
* Over-mold for increased reliability.
* Simpler supply chain: the substrate house and substrate inventories were no longer needed.
* Simpler assembly: the bump interconnect and bond wires were no longer needed.
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