Samsung and Cadence announce production of breakthrough 32nm HD digital camera SoC for Ambarella

ARM TechCon 2011, SANTA CLARA, USA: Samsung Electronics Co. Ltd and Cadence Design Systems Inc. announced the initial production of Ambarella’s 32-nanometer (nm) HD digital camera system-on-chip (SoC).

This SoC, in production at the S1-Line at Samsung’s Giheung facility, was built using 32nm gate-first High-k Metal Gate (HKMG) process technology from Samsung Electronics’ foundry business, Samsung Foundry, a complete Cadence digital design flow including the Encounter and Incisive platforms and ARM Cortex processor and Artisan physical IP. Leveraging the combined technology leadership of Samsung Foundry and Cadence, the new Ambarella A7L SoC brings new levels of performance and power savings to digital lifestyle HD camera applications.

“Teaming with Samsung Foundry and Cadence reduced our risk and gave us access to the most advanced foundry silicon process, superior IP and design methodology in addition to excellent design services,” said Chan Lee, VP of VLSI, Ambarella. “Impressively, Samsung Foundry’s process technology, combined with the Cadence digital flow, enabled us to hit our aggressive performance targets while achieving 95 percent power savings during power shutoff mode and 60 percent average power savings over operation and sleep modes.”

Collaboration on this project took place at Samsung Foundry’s design center with engineers from all three companies working side-by-side on all aspects of the Ambarella A7L SoC design, which included several million logic gates and scores of Ambarella’s custom proprietary high speed mixed signal blocks. The teams were able to combine optimized IP, silicon-proven design flows and process technology requirements in real-time to meet the Ambarella next-generation design needs. Ambarella also utilized Samsung Foundry’s full turn-key offering, including manufacturing, test and packaging, to accelerate time to market and simplify the supply chain.

“The close collaboration between industry leaders makes it possible for our customers to thrive in today’s challenging technology environment,” said Ana Hunter, VP of Foundry, Samsung Semiconductor Inc. “Companies that invest in designs at the advanced process nodes will lead the next-generation of consumer and IT products. Ambarella is clearly on the leading-edge of design innovation, and we’re pleased to have collaborated with Cadence to provide Ambarella with a 32nm HKMG solution for its next-generation camera SoC.”

The Ambarella A7L design took advantage of the complete digital flow from Cadence for IP integration and validation. Engineers were able to meet and exceed their aggressive performance and power design objectives using key capabilities such as intelligent power shutoff and sleep modes. The integrated design flow included the Encounter Digital Implementation System, featuring the NanoRoute Router for 32nm digital routing, Encounter RTL Compiler, Encounter Timing System, Encounter Power System, and Incisive Enterprise Simulator, covering all elements of design, verification and implementation.

“Cadence has established advanced node technology in production to address the many unique design complexities and advanced process rules for 32nm HKMG designs,” said Dr. Chi-Ping Hsu, senior vice president, research and development, Silicon Realization Group at Cadence. “The successful production tapeout of this Ambarella A7L design also demonstrates the synergy created when leading technology companies join forces throughout the design process, and how companies like Ambarella are benefitting from such deep collaboration.”

In advance of this project, as part of its ongoing customer shuttle program, Samsung Foundry assisted in porting all necessary Ambarella IP to its production-ready 32nm HKMG process technology to ensure that the Ambarella proprietary IP was pre-verified in the new node. Samsung Foundry also provided silicon-proven ARM Artisan optimized logic and memory IP in support of the overall IP needed for this project.

“This industry leading 32nm HD system on chip demonstrates the strength in our industry collaboration to accelerate advanced node technology in next generation consumer devices,” said John Heinlein, VP of marketing, Physical IP division, ARM. “Drawing on proven technology from industry leaders including Samsung Foundry’s 32nm HKMG process technology, Cadence Encounter flow, and ARM Cortex processor and Artisan physical IP, we have enabled rapid development of the Ambarella A7L design while ensuring optimal performance and power management.”