International symposia on EUV lithography and lithographic extensions

MIAMI, USA: As reported at the 2011 International Extreme Ultraviolet Lithography (EUVL) and Lithography Extensions (LE) Symposia, Oct. 17-21 in Miami, FL, SEMATECH engineers and the industry at large continue to evolve the infrastructure that will enable lithography for cost-effective manufacturing. This year’s EUVL symposium was co-organized by SEMATECH in cooperation with EIDEC and IMEC; the Lithography Extensions Symposium was held in cooperation with IMEC.

The week-long duo of lithography events attracted a record-breaking attendance of over 550 top experts and researchers discussing progress on extending current technologies while building the infrastructure for future solutions. A combined set of 86 technical papers and 79 posters reported steady, measured progress in many key areas. Presenters additionally highlighted various technology, infrastructure, and business challenges that the industry needs to address to successfully insert EUVL into manufacturing at the 22 nm half-pitch node.

Progress reported at the EUVL symposium included EUV scanners being shipped over the past year and pilot lines being ramped-up to enable first product use on critical layers as early as 2013. With chip manufacturers integrating EUVL technology into their fabs, the industry is now focused on resolving the remaining challenges to EUVL high volume manufacturing. This was evident from the paper and poster topics, the majority of which were related to manufacturing introduction and addressing remaining engineering challenges:

The EUVL symposium plenary address “Transform Designs to Chips with Sub-20nm Technologies” by Joshua Li of NVIDIA highlighted the design-driven challenges for lithography technologies to meet fabless company device performance and cost targets for sub-20 nm manufacturing.

The EUVL symposium keynote address “EUV Readiness and ASML NXE3100 Performance” by Han-Ku Cho of Samsung assessed the pilot line readiness of EUV lithography and outlined the time-table and performance requirements needed to introduce the technology into high volume manufacturing (HVM) for DRAM products in 2013.

Blank and mask makers continue to reduce mask defects, and IC makers including GLOBALFOUNDRIES, IBM, Intel, Toshiba, and TSMC are demonstrating progress in developing defect avoidance and mitigation strategies that will allow them to use masks with a few residual defects. Current mask defect levels are soon expected to support DRAM for pilot line operation, while lower mask defect levels are required to meet logic/foundry requirements.

Over the past year, the industry has put programs in place that will close the infrastructure gaps for EUV blank/mask inspection and defect review by 2014/15; most notably is the development of an AIMS tool led by SEMATECH through the EUV Mask Infrastructure partnership.

Several chemically amplified resist (CAR) materials achieving sub-20 nm resolutions were demonstrated by researchers from the member companies in SEMATECH’s Resist Program. A 15 nm half-pitch resolving CAR was exposed on SEMATECH’s microexposure tool (MET) at Lawrence Berkeley National Laboratory by JSR, and a nanoparticle resist material developed in a SEMATECH research program with Cornell University has demonstrated mid-20 nm half-pitch resolution at excellent photosensitivity on SEMATECH’s MET in Albany, NY.

SEMATECH researchers and research partners highlighted the key role the consortium has played in achieving significant advances in the fundamental understanding and reduction of mask blank defects in mask manufacturing and use as well as in achieving breakthroughs in EUV resist materials development.

Emily Gallagher of IBM won the best paper award for her presentation on EUV mask readiness, “EUV Masks: Ready or Not?” The best poster award winner was Hyung-Cheol Lee et al., from Hanyang University for their work on “Realistic Thermal Effect of Extreme Ultraviolet Pellicle.”

Lastly, the EUVL Symposium Steering Committee identified three remaining focus areas that the industry must work on to enable EUVL manufacturing insertion:
1. Long-term reliable source operation with 200 W at intermediate focus
2. Mask yield and defect inspection/review infrastructure
3. Simultaneous achievement of resist resolution, sensitivity, and LER

The Lithography Extensions Symposium included innovative patterning techniques that have the potential to cost-effectively extend resolution capabilities.

Key highlights include the following:

Directed self-assembly (DSA) is making significant progress towards potential commercial application in semiconductor manufacturing. A variety of techniques including chemo-epitaxy, graphoepitaxy, and spin-on spacer, have been demonstrated as potential DSA-based patterning approaches. Many resist and chemical suppliers, including AZ, JSR, and DOW, have active development activities both internally and with research partners.

IBM reported on the application of DSA to improve the patterning capability of existing lithography systems through contact hole rectification. Initial defectivity assessments indicate that the current measured defectivity is similar to what was initially seen during the development of immersion lithography.

Best paper award winner Cliff Henderson of Georgia Tech highlighted significant progress toward developing of a mesoscale model to accurately predict material interactions, which is needed to identify materials for DSA applications. Such predictive models will help design more effective DSA systems without time-consuming experimentation.

Matt Malloy of SEMATECH’s Nanoimprint program summarized achievements over the past 3 years, including demonstrating an overlay capability of 15 nm and imprint process defectivity of <0.1 def/cm2. This highlights the potential for achieving defect levels commensurate with manufacturing requirements.

The 2011 International EUVL and Lithography Extensions Symposia are central elements of the SEMATECH Knowledge Series – a set of public, single-focused industry meetings designed to increase global knowledge in key areas of semiconductor R&D – and represent a great success in the history of SEMATECH-sponsored conferences as these technologies have evolved from tabletop experiments to fully adopted high volume manufacturing over the past half dozen years.