Monday, March 7, 2011

Vitesse simplifies transition to packet-based networks

OFC/NFOEC 2011, LOS ANGELES, USA: Vitesse Semiconductor Corp. has announced the latest additions to its 10G physical layer (PHY) portfolio of multi-channel devices that integrate full IEEE 1588v2 timing synchronization and Y.1731 Operations Administration and Maintenance (OAM)/Performance Monitoring (PM) features.

These 10G PHYs (VSC8487-15 and VSC8488-15) are the first in the industry to integrate both of these Carrier features, essential for supporting time-critical services in wireless backhaul, business services, data center and smart grid applications in newer packet-based networks.

As networks migrate from TDM-based protocols to packet-based protocols, existing levels of timing accuracy must be maintained. Service providers implement 1588v2 precision packet-based timing standards to provide the accurate timing performance their customers have experienced in the TDM network. By also utilizing Y.1731 OAM functions, service providers and network operators can measure performance end-to-end even in a multi-operator environment. This allows them to guarantee service performance for applications such as Voice-over-IP (VoIP) and video where packet delay and delay variations are most sensitive.

Implementing 1588v2 and Y.1731 directly in the PHY improves the accuracy of the implementation, allowing equipment vendors to seamlessly upgrade existing systems with these new standards without having to upgrade the switch or network processor silicon. The new Vitesse PHYs offer a low-risk and fast time-to-market implementation from a hardware and software standpoint.

Additionally, the Vitesse 10G PHY portfolio supports Synchronous Ethernet, both one- and two-step time-stamping, along with the broadest protocol/data encapsulation support in the industry. The devices are pin-compatible with previous generations of Vitesse PHYs and interface with Vitesse’s Jaguar, Caracal and Tiger Ethernet switch engines, which also support 1588v2 and Y.1731.

“Time-stamping can be implemented at the MAC or switch layer, yet we see advantages in this new approach Vitesse is providing – placing synchronization at the physical-layer interface. In particular, it provides equipment manufacturers a simple 1588v2 and Y.1731 upgrade path for existing platforms,” said Michael Howard, principal analyst at Infonetics Research. “The combination of network timing and OAM performance monitoring in 10G networks helps to make guaranteed Service Level Agreements and network fault resilience possible.”

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