MOUNTAIN VIEW, USA: Synopsys Inc. announced the availability of high-quality DesignWare High-Definition Multimedia Interface (HDMI) 1.4 transmitter (Tx) and receiver (Rx) digital controllers and PHY IP solutions that are compliant to the standard specification.
With full support for new features of the HDMI 1.4 specification including HEAC 3D formats, real-time content signaling, 4K x 2K resolution and 10.2 Gbps aggregate bandwidth, the DesignWare HDMI IP enables designers to quickly incorporate differentiated functionality into their digital TV (DTV) and home theater applications with less risk and improved time-to-market.
With designers incorporating networking capabilities in next-generation home entertainment devices, the HEAC block in the DesignWare HDMI 1.4 solution helps simplify the connectivity between internet-enabled digital home devices by enabling the transfer of Ethernet and audio frames through a single HDMI cable.
The DesignWare IP for HDMI 1.4 also incorporates all 3D formats, which allows device manufacturers to heighten the viewing experience by supporting 3D techniques such as full side-by-side, half side-by-side and frame alternative. The real-time content signaling capability enables televisions to automatically optimize the picture setting with no user intervention. Support for 4K x 2K resolution delivers up to four times the resolution of 1080p, providing the same resolution as state-of-the-art digital cinema systems.
"With a strong focus on innovation, DisplayLink continues to incorporate the latest technologies into our leading network display products," said Jonathan Jeacocke, vice president of engineering at DisplayLink. "When we wanted to incorporate HDMI IP into our SoC, we turned to Synopsys to provide us with a silicon-proven IP solution that had all the required features. We knew that Synopsys, a trusted IP vendor, would be there to not only provide us with a high-quality product, but also the expert technical support if and when we needed it."
The DesignWare HDMI IP solution includes a comprehensive set of IP deliverables including baseline software drivers for system development, which help designers quickly embed this complex interface into next-generation multimedia system-on-chips (SoCs). Furthermore, the solution provides the following:
* Compliance with HDMI and HDCP specifications with certification from the NXP HDMI authorized testing center and successful interoperability results from HDCP plugfest events.
* A superior analog front end that supports up to 20 foot category 2-certified HDMI cables, while maintaining high performance.
* Digital controllers delivered in configurable RTL allow designers to optimize gate count and power consumption by choosing only the features required in their application.
* PHY offering low power consumption and small die area.
* Numerous optional features such as HDCP encryption engine, audio formats, audio DMA engine and system-bus interfaces which help ease the integration effort.
* System validation based on the Synopsys Confirma HAPS-51 rapid prototyping platform.
The DesignWare HDMI 1.4 Tx and Rx IP solution is available now. The HDMI PHY IP is available in more than 10 process technologies from 90-nanometers (nm) to 40-nm, and from leading foundries.
Tuesday, January 26, 2010
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