USA: Next month, IC Insights’ April Update to The 2013 McClean Report will show a ranking of the 2012 top-50 semiconductor suppliers; a preview of the top-25 companies is listed in Fig. 1.
The top 25 worldwide semiconductor (ICs and O-S-Ds—optoelectronics, discretes, and sensors) sales leaders for 2012 include 10 suppliers headquartered in the U.S., seven in Japan, three in Taiwan, three in Europe, and two in South Korea, a relatively broad representation of geographic regions. The top 25 ranking also includes three pure-play foundries (TSMC, GlobalFoundries, and UMC) and six fabless companies.
It is interesting to note that the top five semiconductor suppliers all have different business models. Intel being essentially a pure-play IDM, Samsung a vertically integrated IC supplier, TSMC a pure-play foundry, Qualcomm a fabless company, and TI a fab-lite semiconductor supplier. In 2012, the pure-play foundries and fabless companies were the star performers.
IC foundries are included in the top 25 semiconductor supplier ranking because IC Insights has always viewed the ranking as a top supplier list, not as a marketshare ranking, and realizes that in some cases semiconductor sales are double counted. With many of our clients being vendors to the semiconductor industry (supplying equipment, chemicals, gases, etc.), excluding large IC manufacturers like the foundries would leave significant “holes” in the list of top semiconductor suppliers.
Foundries and fabless companies are each clearly identified in Fig, 1. In the April Update to The McClean Report, “marketshare” rankings of IC suppliers by product type are also presented and foundries are excluded from these rankings.
It should be noted that not all foundry sales should be excluded when attempting to create marketshare data. For example, although Samsung has a large amount of foundry sales, most of its sales are to Apple. Since Apple does not re-sell these devices, counting these foundry sales as Samsung semiconductor sales does not introduce double counting.
Overall, the list shown in Fig. 1 is provided as a guideline to identify which companies are the leading semiconductor suppliers, whether they are IDMs, fabless companies, or foundries.
In total, the top 25 semiconductor companies’ sales declined by 1 percent in 2012, two points less than the total worldwide semiconductor market decline of 3 percent. It took semiconductor sales of at least $3 billion in 2012 to make the top 25 ranking, about the same dollar amount needed to construct a 10K wafer-per-month 300mm wafer fabrication facility.
Intel remained firmly in control of the number one spot in the ranking in 2012. In fact, Intel, helped by its acquisition of Infineon’s wireless IC business, extended its lead over second-ranked Samsung by registering a 52 percent higher semiconductor sales level than Samsung in 2012 as compared to a 24 percent margin in 2010.
The only movement with regard to the top five spots in the 2012 ranking was that fabless supplier Qualcomm registered a 34 percent surge in sales and moved up three positions to replace TI as the fourth-largest semiconductor supplier.
After its 21 percent drop in sales in 2012, Elpida, which is due to be acquired by Micron sometime in the first half of 2013, fell five spots in the top 25 ranking going from 19th place in 2011 to 24th place in 2012. However if Micron and Elpida’s 2012 sales were combined, the “new” company would have had $11,077 million in total sales and would have been ranked as the seventh-largest semiconductor supplier, only $140 million behind sixth-ranked Toshiba.
New entrants into the top 25 ranking in 2012 included Taiwan-based fabless communications chip specialist MediaTek, which moved from being ranked 26th in 2011 to 21st in 2012. MediaTek is Taiwan’s largest non-foundry semiconductor supplier. Japan-based Sharp jumped five positions in the ranking last year and moved into the 22nd spot. Sharp’s 14 percent total semiconductor sales increase in 2012 was spurred by a 20 percent surge in its O-S-D sales.
As shown in Fig. 2, there was a wide range of growth rates among the worldwide top 25 semiconductor suppliers last year. It is interesting to note that despite the close on-going relationship between GlobalFoundries (31 percent increase) and AMD (17 percent decline), the two companies were at opposite ends of the growth spectrum in 2012.
Considering that AMD, the original “parent” and largest customer of GlobalFoundries, suffered such a steep sales decline last year, it is obvious that GlobalFoundries’ spike in revenue in 2012 was driven mostly by its success in attracting new IC foundry customers (e.g., ST, Freescale, Qualcomm, etc.).
The continued success of the fabless/foundry business model is evident when examining the top 25 semiconductor suppliers ranked by growth rate. As shown, the top seven performers included four fabless companies (Qualcomm, MediaTek, Broadcom, and Nvidia) and two pure-play foundries (GlobalFoundries and TSMC).
Illustrating the very difficult year faced by the majority of the top 25 semiconductor suppliers, 17 of the top 25 ranked companies registered a sales decline last year, including eight of the top 10 largest semiconductor suppliers in the world (#1 Intel, #2 Samsung, #5 TI, #6 Toshiba, #7 Renesas, #8 SK Hynix, #9 ST, and #10 Micron).
Of the seven top 25 semiconductor companies that registered a sales increase in 2012, four are headquartered in the US and include Qualcomm, GlobalFoundries, Broadcom, and Nvidia.
Friday, March 29, 2013
LDRA extends integration with MATLAB and Simulink
DESIGN WEST 2013, ENGLAND: LDRA, the leader in standards compliance, automated software verification, source code analysis and test tools, now offers unprecedented verification of the model through a sophisticated integration with MATLAB and Simulink.
The LDRA tool suite can now use real-world data from MATLAB that’s connected to a Simulink model in order to fully verify the application at a source and object code level. Developers can fine-tune the model to reflect a data-driven flow of information, reducing the amount of error-prone manual manipulation necessary for the model-generated code to achieve DO-178C, Level A certification.
The most critical levels of certification require comprehensive testing of an application by independent analysis not only at the source code level, but also at the machine code assembler level. While model-driven development typically ensures consistent code, verification previously required many more steps.
Developers could verify the model, but to ensure the model-generated code properly managed a real-world situation, the code had to be extracted, instrumented, connected to an execution harness, and executed against functional verification data. Discrepancies in the functionality required developers to rework the model and manually manipulate the code. Not until the developer could prove that every line of code had been fully tested could an application be submitted for Level A certification.
Thanks to the integration with MATLAB and Simulink, customers can run real-world code generated by Embedded Coder in software in the loop (SIL) and processor in the loop (PIL) simulations. The LDRA tool suite will then analyze both the source and object codes entirely inside the same LDRA framework.
LDRA acts as an independent verification layer, working within the MATLAB and Simulink environment. By applying data from models, developers can better understand how various components of the application interact with each other. Defects in the design can be identified, and changes made to the model directly, eliminating many hours of error-prone iterations between the model, code and data.
The LDRA tool suite can now use real-world data from MATLAB that’s connected to a Simulink model in order to fully verify the application at a source and object code level. Developers can fine-tune the model to reflect a data-driven flow of information, reducing the amount of error-prone manual manipulation necessary for the model-generated code to achieve DO-178C, Level A certification.
The most critical levels of certification require comprehensive testing of an application by independent analysis not only at the source code level, but also at the machine code assembler level. While model-driven development typically ensures consistent code, verification previously required many more steps.
Developers could verify the model, but to ensure the model-generated code properly managed a real-world situation, the code had to be extracted, instrumented, connected to an execution harness, and executed against functional verification data. Discrepancies in the functionality required developers to rework the model and manually manipulate the code. Not until the developer could prove that every line of code had been fully tested could an application be submitted for Level A certification.
Thanks to the integration with MATLAB and Simulink, customers can run real-world code generated by Embedded Coder in software in the loop (SIL) and processor in the loop (PIL) simulations. The LDRA tool suite will then analyze both the source and object codes entirely inside the same LDRA framework.
LDRA acts as an independent verification layer, working within the MATLAB and Simulink environment. By applying data from models, developers can better understand how various components of the application interact with each other. Defects in the design can be identified, and changes made to the model directly, eliminating many hours of error-prone iterations between the model, code and data.
Intel and Samsung forecast to represent 42 percent of semiconductor capital spending in 2013
USA: IC Insights’ soon-to-be-released March Update to The 2013 McClean Report lists the forecasted 2013 top-25 semiconductor capital spenders with preview of the top-10 spenders listed in Fig. 1.
As shown, there are five companies that are expected to spend at least $3 billion in 2013, the same as in 2012 and 2011. Fig. 1 also shows that although the top-10 capital spenders cut their outlays by 5 percent in 2012, the non-top-10 spenders cut their capital spending by 27 percent last year, illustrating how “top-heavy” the semiconductor capital spending environment has become.
For 2013, the top-10 capital spenders are forecast to increase their spending by 5 percent as compared to 2012, which would be 13 points better than the results expected from the non-top-10 companies (-8 percent).
IC Insights believes that, in the long run, the “other” companies are likely to continue to increase their spending at a slower rate, or decrease their spending at a higher rate, as compared to the top 10 companies as they implement the fabless or “fab-lite” business models for their IC production.
In IC Insights’ opinion, IC manufacturers that are currently spending less than $1 billion a year on capital outlays will find it just about impossible to manufacture using leading-edge digital processing technology. Companies that are in significant trouble in this regard include Taiwanese IC suppliers Nanya, Powerchip, and ProMOS. These three companies combined spent only $276 million in 2012, which is less than 10 percent of the cost of one new leading-edge IC fab.
Some of the most “eye-catching” numbers with regards to the capital spending outlays are the massive amounts of spending expected by Samsung and Intel over the 2010-2013 timeperiod. Over this four-year period, Samsung is forecast to spend $46.9 billion, with about 60 percent of this amount targeting memory production.
Intel is forecast to be second to Samsung in total outlays over this timeperiod with an expected $40.0 billion in capital expenditures. These huge levels of spending are enough for each company to construct and equip ten or eleven $4 billion leading-edge 300mm wafer fabs. Notably, the combined spending by Samsung and Intel represented 40 percent of the world’s semiconductor capital outlays in 2012, with this percentage expected to rise to 42 percent of total capital spending in 2013.
Capital spending by nationality
Fig. 2 segments the forecasted 2013 capital spending by company headquarters location with results from eight years earlier in 2005 also shown. In 2013, only the North American suppliers, which are expected to represent 37 percent of worldwide spending (up eight points from eight years earlier), and the South Korean semiconductor companies, which are forecast to represent 26 percent of capital outlays (up 13 points in share from 2005), are expected to hold a larger share of spending in 2013 than they did in 2005.
Since adopting the fab-lite business model, the three major European IC producers are now forecast to represent only about 2 percent of the spending total in 2013 after representing 8 percent of worldwide semiconductor capital spending in 2005. In comparing the forecast for 2013 with the actual results in 2005, declines in capital spending marketshare are expected by the Japanese (15 points), European (six points), and “other” companies (one point).
The sharp loss of share by the Japanese and European companies is primarily due to the movement of many of these producers to the fab-lite manufacturing model. The Taiwanese companies’ flat share is due to a mixture of the second-tier Taiwanese DRAM producers Nanya, Powerchip, and ProMOS keeping their capital expenditures to the bare minimum this year while the Taiwanese foundries TSMC and UMC strive to be aggressive.
The “other” segment includes companies from India, Singapore, China, etc., as well as the major contract assembly and test houses (i.e., OSAT suppliers). Although there have been periodic spikes in the “other” spending over the years, IC Insights believes that in the long-term, the “other” category will represent a flat to slowly shrinking share of total semiconductor industry capital spending.
As shown, there are five companies that are expected to spend at least $3 billion in 2013, the same as in 2012 and 2011. Fig. 1 also shows that although the top-10 capital spenders cut their outlays by 5 percent in 2012, the non-top-10 spenders cut their capital spending by 27 percent last year, illustrating how “top-heavy” the semiconductor capital spending environment has become.
For 2013, the top-10 capital spenders are forecast to increase their spending by 5 percent as compared to 2012, which would be 13 points better than the results expected from the non-top-10 companies (-8 percent).
IC Insights believes that, in the long run, the “other” companies are likely to continue to increase their spending at a slower rate, or decrease their spending at a higher rate, as compared to the top 10 companies as they implement the fabless or “fab-lite” business models for their IC production.
In IC Insights’ opinion, IC manufacturers that are currently spending less than $1 billion a year on capital outlays will find it just about impossible to manufacture using leading-edge digital processing technology. Companies that are in significant trouble in this regard include Taiwanese IC suppliers Nanya, Powerchip, and ProMOS. These three companies combined spent only $276 million in 2012, which is less than 10 percent of the cost of one new leading-edge IC fab.
Some of the most “eye-catching” numbers with regards to the capital spending outlays are the massive amounts of spending expected by Samsung and Intel over the 2010-2013 timeperiod. Over this four-year period, Samsung is forecast to spend $46.9 billion, with about 60 percent of this amount targeting memory production.
Intel is forecast to be second to Samsung in total outlays over this timeperiod with an expected $40.0 billion in capital expenditures. These huge levels of spending are enough for each company to construct and equip ten or eleven $4 billion leading-edge 300mm wafer fabs. Notably, the combined spending by Samsung and Intel represented 40 percent of the world’s semiconductor capital outlays in 2012, with this percentage expected to rise to 42 percent of total capital spending in 2013.
Capital spending by nationality
Fig. 2 segments the forecasted 2013 capital spending by company headquarters location with results from eight years earlier in 2005 also shown. In 2013, only the North American suppliers, which are expected to represent 37 percent of worldwide spending (up eight points from eight years earlier), and the South Korean semiconductor companies, which are forecast to represent 26 percent of capital outlays (up 13 points in share from 2005), are expected to hold a larger share of spending in 2013 than they did in 2005.
Since adopting the fab-lite business model, the three major European IC producers are now forecast to represent only about 2 percent of the spending total in 2013 after representing 8 percent of worldwide semiconductor capital spending in 2005. In comparing the forecast for 2013 with the actual results in 2005, declines in capital spending marketshare are expected by the Japanese (15 points), European (six points), and “other” companies (one point).
The sharp loss of share by the Japanese and European companies is primarily due to the movement of many of these producers to the fab-lite manufacturing model. The Taiwanese companies’ flat share is due to a mixture of the second-tier Taiwanese DRAM producers Nanya, Powerchip, and ProMOS keeping their capital expenditures to the bare minimum this year while the Taiwanese foundries TSMC and UMC strive to be aggressive.
The “other” segment includes companies from India, Singapore, China, etc., as well as the major contract assembly and test houses (i.e., OSAT suppliers). Although there have been periodic spikes in the “other” spending over the years, IC Insights believes that in the long-term, the “other” category will represent a flat to slowly shrinking share of total semiconductor industry capital spending.
Thursday, March 28, 2013
IXYS announces qualification of high reliability power semiconductors into Japanese N700A series of Shinkansen bullet trains
SWITZERLAND: IXYS Corp. has announced the full qualification and first order series for its IXYS UK division for hermetic power semiconductor thyristors (SCR) and fast recovery diode capsules to be installed on Japan’s latest generation of Shinkansen bullet trains.
The N700 series is a Japanese Shinkansen high-speed train with tilting capability developed in 2007 for operation by Japanese Rail (JR) on the Tokaido line between Tokyo and Hakata.
N700 series trains (also referred to as the NOZOMI Super Express) have a maximum speed of 300 km/h (186 mph) and is the forerunner of tilting technology. The latest generation, the N700A, is planned for commissioning from December 2013 with a plan to produce a total of 53 trains (16 cars each train) over the next couple of years.
The N700A utilizes the improved power efficiency and highest reliability of IXYS UK’s high voltage capsule thyristors and fast recovery diodes. With this design win, IXYS UK has again succeeded in meeting the advanced qualification processes required within the Japanese traction industry.
IXYS UK provides the semiconductor solution for the Static Inverter (SIV) rectifier and inrush current limiter stages requiring operating voltages up to five thousand volts.
“We are extremely proud to announce our successful qualification and first series of orders for such a high profile application which demands the very best performance of our products,” commented Bradley Green, president of International Sales and Business Development at IXYS.
“The qualification of more of our products into the Japanese rail system builds on our growing business platform in the Japanese market against strong domestic competition, and continues our penetration of the global traction industry.”
The N700 series is a Japanese Shinkansen high-speed train with tilting capability developed in 2007 for operation by Japanese Rail (JR) on the Tokaido line between Tokyo and Hakata.
N700 series trains (also referred to as the NOZOMI Super Express) have a maximum speed of 300 km/h (186 mph) and is the forerunner of tilting technology. The latest generation, the N700A, is planned for commissioning from December 2013 with a plan to produce a total of 53 trains (16 cars each train) over the next couple of years.
The N700A utilizes the improved power efficiency and highest reliability of IXYS UK’s high voltage capsule thyristors and fast recovery diodes. With this design win, IXYS UK has again succeeded in meeting the advanced qualification processes required within the Japanese traction industry.
IXYS UK provides the semiconductor solution for the Static Inverter (SIV) rectifier and inrush current limiter stages requiring operating voltages up to five thousand volts.
“We are extremely proud to announce our successful qualification and first series of orders for such a high profile application which demands the very best performance of our products,” commented Bradley Green, president of International Sales and Business Development at IXYS.
“The qualification of more of our products into the Japanese rail system builds on our growing business platform in the Japanese market against strong domestic competition, and continues our penetration of the global traction industry.”
Analog Devices announces Design Conference 2013
USA: Analog Devices Inc., in collaboration with Xilinx Inc. and MathWorks Inc., is launching a series of design conferences for analog, mixed-signal and embedded systems engineers.
Based on the theme “Discuss. Design. Deliver.,” the conferences will bring together experts in high-performance analog, field-programmable gate arrays (FPGA) and modeling tools to present complete signal chain and system-ready solutions for complex design challenges.
Engineers attending Design Conference 2013 will leave with practical knowledge and understanding of new products and solutions they can use in their designs. Experts from multiple engineering disciplines will lead the conferences and instruct engineers on advanced techniques of high-performance signal processing, reference designs and systems applications.
Design Conference 2013 will take place in the United States, Germany and China. Avnet, Digilent and 4DSP, sponsors of the US conferences, will showcase their industry-leading solutions based on ADI’s analog and mixed-signal technologies.
Based on the theme “Discuss. Design. Deliver.,” the conferences will bring together experts in high-performance analog, field-programmable gate arrays (FPGA) and modeling tools to present complete signal chain and system-ready solutions for complex design challenges.
Engineers attending Design Conference 2013 will leave with practical knowledge and understanding of new products and solutions they can use in their designs. Experts from multiple engineering disciplines will lead the conferences and instruct engineers on advanced techniques of high-performance signal processing, reference designs and systems applications.
Design Conference 2013 will take place in the United States, Germany and China. Avnet, Digilent and 4DSP, sponsors of the US conferences, will showcase their industry-leading solutions based on ADI’s analog and mixed-signal technologies.
Sixth annual SoCIP conference opens for registration
CHINA: S2C, the SoCIP show organizer, has announced that registration for the SoCIP 2013 conference, to be held in Shanghai on May 21 and Beijing on May 23, is now open.
China is becoming one of the world’s center stages for modern system-on-chip (SoC) design. Efficiently using and reusing silicon intellectual properties (IP) is critical for delivering high quality SoC products while meeting competitive market schedules.
SoCIP 2013 is China’s leading SoCIP conference, focused on providing the latest Silicon IP information together with tools and services relevant to enabling a robust IP-based SoC design methodology.
Key highlights of the planned topics at SoCIP 2013:
• Discovering a better way to go from behavior C-level models to synthesis for SoC designs.
• Using alternative 32-bit BA2x Processor Cores in Deeply Embedded Systems.
• All you need to know about integrating Bluetooth into your next SoC.
• An H.264 High-Profile Encoder IP Core that offers exceptional video quality, competitive performance, and easy system integration.
• Building a rapid, scalable and reliable SoC prototyping platform using the world’s largest FPGA - the Virtex-7 2000T.
In additional to the vendor presentations, a number of real users will share their first-hand experiences with the products and technologies presented at the conference. The attendees will also have the opportunity for face-to-face interaction with experts from the participating vendors at both exhibition sessions.
China is becoming one of the world’s center stages for modern system-on-chip (SoC) design. Efficiently using and reusing silicon intellectual properties (IP) is critical for delivering high quality SoC products while meeting competitive market schedules.
SoCIP 2013 is China’s leading SoCIP conference, focused on providing the latest Silicon IP information together with tools and services relevant to enabling a robust IP-based SoC design methodology.
Key highlights of the planned topics at SoCIP 2013:
• Discovering a better way to go from behavior C-level models to synthesis for SoC designs.
• Using alternative 32-bit BA2x Processor Cores in Deeply Embedded Systems.
• All you need to know about integrating Bluetooth into your next SoC.
• An H.264 High-Profile Encoder IP Core that offers exceptional video quality, competitive performance, and easy system integration.
• Building a rapid, scalable and reliable SoC prototyping platform using the world’s largest FPGA - the Virtex-7 2000T.
In additional to the vendor presentations, a number of real users will share their first-hand experiences with the products and technologies presented at the conference. The attendees will also have the opportunity for face-to-face interaction with experts from the participating vendors at both exhibition sessions.
Silicon Labs launches most integrated multiband receiver solution for wheel-tuned radio designs
USA: Silicon Labs has introduced the latest generation of the company’s widely used analog-tuned, analog/digital-display (ATxD) multiband radio IC family.
The new Si4825/27/36 AM/FM/SW receivers provide superior radio band coverage and a 16-pin SOIC package option that eases the design and manufacturing of ATxD radio products.
The new Si48xx radio ICs provide an “all-in-one” single-chip receiver solution for tabletop and portable radios, stereos, mini/micro systems, boomboxes, clock radios, iPod docking stations, toy radios and many other consumer products containing wheel-tuned radios.
The wheel-tuned or “analog-tuned” multiband radio product market exceeds 115 million units per year, according to Silicon Labs estimates. More than 90 percent of all ATxD radios including products for the global export market are manufactured in China.
A pioneer in RF-in-CMOS multiband receivers for the wheel-tuned radio market, Silicon Labs has now delivered three generations of single-chip receiver solutions that reduce the cost and complexity and simplify the manufacturing of radio products used by many millions of consumers worldwide.
Silicon Labs’ new Si4825/27/36 receivers offer the same exceptional RF performance, unmatched integration in CMOS, bill of materials (BOM) and labor cost reduction, and ease of design and manufacturing as previous generations of Si48xx radio ICs.
In addition, the new receivers use a single band to cover a wider frequency range for FM and SW bands, and they also support TV audio carrier reception in the China market. Additionally, the devices provide advanced audio conditioning for all signal environments, removing pops, clicks and loud static in challenging signal conditions.
The Si4825 mono-output, consumer-grade product and the Si4836 stereo-output, commercial-grade product are designed for the ATAD radio market. The Si4827 mono-output, consumer-grade product targets the ATDD radio market.
Each receiver supports worldwide broadcast frequencies from 64-109 MHz in FM, 504-1750 kHz in AM and 2.3-28.5 MHz in shortwave (SW), enabling a single radio design based on the receivers to support all worldwide markets.
“Silicon Labs’ Si48xx multiband receiver family provides an innovative ‘radio-on-a-chip’ architecture that enables wheel-tuned radio manufacturers to simplify and shrink their board designs, eliminate costly manual labor in manufacturing and reduce component count by more than 80 percent,” said James Stansberry, vice president and general manager of Silicon Labs’ broadcast products.
“Our new wheel-tuned receivers leverage the patented low-IF digital architecture, digital core and audio conditioning technology used in our most advanced radio IC products adopted by Tier 1 audio product brands around the world.”
The Si4825/27/36 multiband receivers are available in a compact 16-pin SOIC package, enabling cost-efficient, single-sided PCB designs and easy handling in manufacturing lines. Samples and production quantities of the new receivers are available now.
The Si4825 is priced at $1.56 in 10,000-unit quantities. The Si4827 is priced at $1.76, and the Si4836 is priced at $1.66, also in 10,000-unit quantities. To ease radio system design, Silicon Labs offers demonstration boards for each receiver product priced at $50.
The new Si4825/27/36 AM/FM/SW receivers provide superior radio band coverage and a 16-pin SOIC package option that eases the design and manufacturing of ATxD radio products.
The new Si48xx radio ICs provide an “all-in-one” single-chip receiver solution for tabletop and portable radios, stereos, mini/micro systems, boomboxes, clock radios, iPod docking stations, toy radios and many other consumer products containing wheel-tuned radios.
The wheel-tuned or “analog-tuned” multiband radio product market exceeds 115 million units per year, according to Silicon Labs estimates. More than 90 percent of all ATxD radios including products for the global export market are manufactured in China.
A pioneer in RF-in-CMOS multiband receivers for the wheel-tuned radio market, Silicon Labs has now delivered three generations of single-chip receiver solutions that reduce the cost and complexity and simplify the manufacturing of radio products used by many millions of consumers worldwide.
Silicon Labs’ new Si4825/27/36 receivers offer the same exceptional RF performance, unmatched integration in CMOS, bill of materials (BOM) and labor cost reduction, and ease of design and manufacturing as previous generations of Si48xx radio ICs.
In addition, the new receivers use a single band to cover a wider frequency range for FM and SW bands, and they also support TV audio carrier reception in the China market. Additionally, the devices provide advanced audio conditioning for all signal environments, removing pops, clicks and loud static in challenging signal conditions.
The Si4825 mono-output, consumer-grade product and the Si4836 stereo-output, commercial-grade product are designed for the ATAD radio market. The Si4827 mono-output, consumer-grade product targets the ATDD radio market.
Each receiver supports worldwide broadcast frequencies from 64-109 MHz in FM, 504-1750 kHz in AM and 2.3-28.5 MHz in shortwave (SW), enabling a single radio design based on the receivers to support all worldwide markets.
“Silicon Labs’ Si48xx multiband receiver family provides an innovative ‘radio-on-a-chip’ architecture that enables wheel-tuned radio manufacturers to simplify and shrink their board designs, eliminate costly manual labor in manufacturing and reduce component count by more than 80 percent,” said James Stansberry, vice president and general manager of Silicon Labs’ broadcast products.
“Our new wheel-tuned receivers leverage the patented low-IF digital architecture, digital core and audio conditioning technology used in our most advanced radio IC products adopted by Tier 1 audio product brands around the world.”
The Si4825/27/36 multiband receivers are available in a compact 16-pin SOIC package, enabling cost-efficient, single-sided PCB designs and easy handling in manufacturing lines. Samples and production quantities of the new receivers are available now.
The Si4825 is priced at $1.56 in 10,000-unit quantities. The Si4827 is priced at $1.76, and the Si4836 is priced at $1.66, also in 10,000-unit quantities. To ease radio system design, Silicon Labs offers demonstration boards for each receiver product priced at $50.
Wednesday, March 27, 2013
Wind River intros Yocto project compatible carrier grade Linux
USA: Wind River has introduced the Wind River Linux Carrier Grade (CG) Profile for the latest version of Wind River Linux. Formally registered for the CGL 5.0 specification with the Linux Foundation, the profile is the first delivery of Carrier Grade Linux functionalities on top of a Yocto Project Compatible product.
With Wind River Linux as a base, the Wind River Linux CG Profile gives customers a turnkey platform that allows them to meet their CGL requirements. Additional profiles for Wind River Linux will continue to be developed to address a variety of market specific needs. The mix and match nature of these profiles for Wind River Linux offers developers flexibility and choice to meet a diverse range of specialized needs.
Carrier Grade Linux registration requires several key requirements to be met, including compliance to standards, support for highly available hardware, serviceability, performance, high availability, clustering and security.
Carrier-grade products typically require up to 5 nines or 6 nines (99.999 to 99.9999 percent) availability, translating to downtime as low as 30 seconds a year. Additionally, given rising network traffic growth and the associated need for greater security of this data, the CGL requirements designed to help make systems more reliable and resistant to attacks become even more significant. Carrier grade is a hard requirement for networking devices, but can also apply to large corporate infrastructures, data centers, and highly mobile devices.
With Wind River Linux as a base, the Wind River Linux CG Profile gives customers a turnkey platform that allows them to meet their CGL requirements. Additional profiles for Wind River Linux will continue to be developed to address a variety of market specific needs. The mix and match nature of these profiles for Wind River Linux offers developers flexibility and choice to meet a diverse range of specialized needs.
Carrier Grade Linux registration requires several key requirements to be met, including compliance to standards, support for highly available hardware, serviceability, performance, high availability, clustering and security.
Carrier-grade products typically require up to 5 nines or 6 nines (99.999 to 99.9999 percent) availability, translating to downtime as low as 30 seconds a year. Additionally, given rising network traffic growth and the associated need for greater security of this data, the CGL requirements designed to help make systems more reliable and resistant to attacks become even more significant. Carrier grade is a hard requirement for networking devices, but can also apply to large corporate infrastructures, data centers, and highly mobile devices.
Microchip adds advanced third-party code to embedded code source’s free offerings
USA: Microchip Technology Inc. announced the expansion of its Embedded Code Source application store and embedded user community for PIC MCU software/firmware code examples, tools and utilities, which often include the source code.
Community members now have a single, easy-to-use source for both free code and premium code with advanced features, which accelerates their designs while enabling more sophisticated and differentiated end products.
Microchip and third parties have already begun selling feature-rich MCU code and MPLAB X IDE plug-ins for Microchip’s more than 1,000 8-bit, 16-bit and 32-bit PIC microcontrollers. All developers are invited to add their free and for-pay code to this user community, which has thousands of active participants.
Embedded industry studies confirm the growing importance of software development, with software engineers comprising two thirds of the development teams in most surveys. Additionally, software is rapidly becoming the most costly portion of product development, in terms of both time and money. Microchip’s Embedded Code Source addresses this trend by providing a one-stop-shop for cost-effective and free pre-written code that can be used immediately to shorten design times.
Embedded Code Source is the first site of its kind to provide developers with a broad distribution outlet for their premium code. It also expands the benefits to Microchip’s more than 70,000 customers, from merely sharing simple code examples into a dynamic marketplace where they can find advanced solutions for their applications.
Community members now have a single, easy-to-use source for both free code and premium code with advanced features, which accelerates their designs while enabling more sophisticated and differentiated end products.
Microchip and third parties have already begun selling feature-rich MCU code and MPLAB X IDE plug-ins for Microchip’s more than 1,000 8-bit, 16-bit and 32-bit PIC microcontrollers. All developers are invited to add their free and for-pay code to this user community, which has thousands of active participants.
Embedded industry studies confirm the growing importance of software development, with software engineers comprising two thirds of the development teams in most surveys. Additionally, software is rapidly becoming the most costly portion of product development, in terms of both time and money. Microchip’s Embedded Code Source addresses this trend by providing a one-stop-shop for cost-effective and free pre-written code that can be used immediately to shorten design times.
Embedded Code Source is the first site of its kind to provide developers with a broad distribution outlet for their premium code. It also expands the benefits to Microchip’s more than 70,000 customers, from merely sharing simple code examples into a dynamic marketplace where they can find advanced solutions for their applications.
Envivio announces HEVC early access program, collaboration with Broadcom
USA: Envivio, a leading provider of software-based live and on-demand video processing and delivery solutions for any screen, announced its HEVC Early Access Program for customers seeking to implement HEVC (H.265) encoding.
HEVC for live or on-demand applications will be available for new installations or as a software upgrade for Envivio Muse customers who run their encoding services on the latest generation Envivio 4Caster G4 appliance or HP blade servers. Initial HEVC software deployments are expected to begin with selected customers in Q2 2013.
Envivio and Broadcom, a global innovation leader in semiconductor solutions for wired and wireless communications, are working on HEVC encoder and decoder interoperability in order to provide a proven, reliable solution ahead of commercial market deployments.
The two companies will demonstrate their technology at NAB 2013, the industry's premier digital media event, featuring HEVC streams in HD encoded by Envivio Muse and decoded by the Broadcom BCM7445. This collaboration enables faster time to market for service providers seeking to roll out HEVC services for OTT or Pay TV services in the coming months.
HEVC for live or on-demand applications will be available for new installations or as a software upgrade for Envivio Muse customers who run their encoding services on the latest generation Envivio 4Caster G4 appliance or HP blade servers. Initial HEVC software deployments are expected to begin with selected customers in Q2 2013.
Envivio and Broadcom, a global innovation leader in semiconductor solutions for wired and wireless communications, are working on HEVC encoder and decoder interoperability in order to provide a proven, reliable solution ahead of commercial market deployments.
The two companies will demonstrate their technology at NAB 2013, the industry's premier digital media event, featuring HEVC streams in HD encoded by Envivio Muse and decoded by the Broadcom BCM7445. This collaboration enables faster time to market for service providers seeking to roll out HEVC services for OTT or Pay TV services in the coming months.
Surprise! NAND flash market defies trends and grows to record level in Q4
USA: Despite facing five consecutive quarters of decline and a slowdown in consumption in smartphones and tablets, the global market for NAND flash memory pulled off a surprise growth spurt during the last three months of 2012, causing sales to reach a record high.
NAND industry revenue in the October to December period of 2012 amounted to $5.6 billion, up an impressive 17 percent from $4.8 billion in the third quarter, according to an IHS iSuppli Flash Dynamics Market Brief. Samsung Electronics, with more than a third of total revenue, led the field. NAND flash revenue for the entire year of 2012 amounted to $20.2 billion.
“The NAND flash market’s expansion in the fourth quarter was significant in two ways,” said Ryan Chien, analyst for memory & storage at IHS.
“Not only did the increase defy the recent trend of sales sliding during the last quarter of a year, the expansion also resulted in the period having the largest revenue results in industry history. Major contributors to NAND strength in the fourth quarter included smartphones and tablets, even though density growth is projected to slow in 2013 for each smartphone, and has been negative for tablets since 2010. For these markets, rising volumes trumped the trend of slower growth in memory usage in the fourth quarter.”
Also playing a notable role in driving NAND growth during the period were solid state drives, along with retail flash products like flash drives and flash cards that likewise continue to attract significant consumer attention.
Flash bang
The 17 percent sequential growth in the fourth quarter last year was in stark contrast to the average 6 percent drop in revenue that had occurred during fourth-quarter periods for the previous five years.
This time, growth was the result of solid product demand relative to preceding periods of weakness, coupled with a return to health for flash manufacturers. An important factor also was strength in component pricing, which fueled similar vigor in product pricing, stock pricing and—ultimately—revenue.
Overall, the revitalized state of the industry is attracting many new entrants, even though their presence is small in what is especially a scale-intensive space.
Samsung and Toshiba remain biggest players
The market share picture in the fourth quarter was similar to what it was a year earlier, with Samsung Electronics and Toshiba as the top two suppliers of NAND flash memory for the industry.
Samsung had fourth-quarter NAND revenue of approximately $2.0 billion, ending the year with a total of $7.5 billion or 37 percent market share. Samsung’s quarterly revenue since 2009 has hovered between $1.7 and $2.1 billion, helped by integration with its booming mobile device business, particularly smartphones.
Toshiba’s NAND revenue in the fourth quarter amounted to $1.8 billion for a year-end total of $6.2 billion—good enough for second place with a 31 percent share.
SK Hynix had bigger fourth-quarter NAND revenue at $683 million than Micron Technology’s $672 million, although their year-end ranking was reversed, with Micron’s $2.7 billion giving it nearly a 14 percent market share, compared to SK Hynix’s $2.3 billion that translated into an 11 percent share.
Intel, the fifth player of note, had fourth-quarter revenue of $484 million for a 2012 total of $1.4 billion, equivalent to 7 percent market share.
The rest of the market, at 0.3 percent, was shared by once-bankrupt Spansion along with Powerchip Technology. Spansion products finally hit the market in the fourth quarter, though these are focused on customers of its industrial NOR flash and will not develop a sizable market share position.
NAND flash output from Macronix and Winbond Electronics is also expected shortly, even though they are not expected to surpass Spansion’s $10 million fourth-quarter revenue level anytime soon.
Source: IHS iSuppli, USA.
NAND industry revenue in the October to December period of 2012 amounted to $5.6 billion, up an impressive 17 percent from $4.8 billion in the third quarter, according to an IHS iSuppli Flash Dynamics Market Brief. Samsung Electronics, with more than a third of total revenue, led the field. NAND flash revenue for the entire year of 2012 amounted to $20.2 billion.
“The NAND flash market’s expansion in the fourth quarter was significant in two ways,” said Ryan Chien, analyst for memory & storage at IHS.
“Not only did the increase defy the recent trend of sales sliding during the last quarter of a year, the expansion also resulted in the period having the largest revenue results in industry history. Major contributors to NAND strength in the fourth quarter included smartphones and tablets, even though density growth is projected to slow in 2013 for each smartphone, and has been negative for tablets since 2010. For these markets, rising volumes trumped the trend of slower growth in memory usage in the fourth quarter.”
Also playing a notable role in driving NAND growth during the period were solid state drives, along with retail flash products like flash drives and flash cards that likewise continue to attract significant consumer attention.
Flash bang
The 17 percent sequential growth in the fourth quarter last year was in stark contrast to the average 6 percent drop in revenue that had occurred during fourth-quarter periods for the previous five years.
This time, growth was the result of solid product demand relative to preceding periods of weakness, coupled with a return to health for flash manufacturers. An important factor also was strength in component pricing, which fueled similar vigor in product pricing, stock pricing and—ultimately—revenue.
Overall, the revitalized state of the industry is attracting many new entrants, even though their presence is small in what is especially a scale-intensive space.
Samsung and Toshiba remain biggest players
The market share picture in the fourth quarter was similar to what it was a year earlier, with Samsung Electronics and Toshiba as the top two suppliers of NAND flash memory for the industry.
Samsung had fourth-quarter NAND revenue of approximately $2.0 billion, ending the year with a total of $7.5 billion or 37 percent market share. Samsung’s quarterly revenue since 2009 has hovered between $1.7 and $2.1 billion, helped by integration with its booming mobile device business, particularly smartphones.
Toshiba’s NAND revenue in the fourth quarter amounted to $1.8 billion for a year-end total of $6.2 billion—good enough for second place with a 31 percent share.
SK Hynix had bigger fourth-quarter NAND revenue at $683 million than Micron Technology’s $672 million, although their year-end ranking was reversed, with Micron’s $2.7 billion giving it nearly a 14 percent market share, compared to SK Hynix’s $2.3 billion that translated into an 11 percent share.
Intel, the fifth player of note, had fourth-quarter revenue of $484 million for a 2012 total of $1.4 billion, equivalent to 7 percent market share.
The rest of the market, at 0.3 percent, was shared by once-bankrupt Spansion along with Powerchip Technology. Spansion products finally hit the market in the fourth quarter, though these are focused on customers of its industrial NOR flash and will not develop a sizable market share position.
NAND flash output from Macronix and Winbond Electronics is also expected shortly, even though they are not expected to surpass Spansion’s $10 million fourth-quarter revenue level anytime soon.
Source: IHS iSuppli, USA.
Tuesday, March 26, 2013
Emerging consumer applications boosting MEMS pressure sensor market
FRANCE: After years of limited growth, the MEMS pressure sensor market is growing due to consumer electronic applications and is expected to show a 22 percent CAGR. Pressure sensors are playing an important role today in modern industries. MEMS pressure sensor is already widely adopted in different applications for its high-performance, low cost and small size.
In its new report MEMS Pressure Sensor, Yole Développement gives a detailed overview of the MEMS pressure sensor markets, technologies and players. This report details the main applications in automotive, consumer, medical, industrial and high-end segment, and the main players in the industry. It also analyses the current pressure sensor technologies including MEMS technologies, and gives a detailed MEMS pressure sensor market forecast by application.
Emerging consumer applications boosting growth of MEMS pressure sensor market and reshuffling main players
MEMS pressure sensor is one of the very first MEMS components appearing in the microsystem world. The technologies are quite mature and the market is big and expected to grow from $1.9 billion in 2012 to $3 billion in 2018.
“MEMS pressure sensor for consumer applications, especially for smartphones and tablets, is following the model of accelerometers and gyroscopes. Adoption of this model will help the MEMS pressure sensor market to boom again! We believe, this huge opportunity will result in the global volume of the MEMS pressure sensor market hitting 2.8 billion units by 2018” announces Wenbin Ding, Technology & Market Analyst, MEMS Devices & Technologies at Yole Développement.
”Consumer pressure sensor will represent 1.7 billion units and will overtake automotive as the market leader in volume!”, she adds. Even though the consumer application has a much lower ASP than other applications, this promising segment will bring more than 8 percent CAGR to the global MEMS pressure sensor market. Yole Développement carefully watches this market. This report has consolidated market data for 2012 and provides forecasts until 2018.
In this report, Yole Développement provides a global overview of the current MEMS pressure sensor technologies, market and competitive landscape. The covered industries in the MEMS pressure sensor 2013 report are automotive, industrial, medical applications, consumer electronics and high-end (aeronautic, military, defense) applications.
For each of the above, Yole Développement’s report gives a market description, examples of the main applications, current market data and forecasts, the main device manufacturers and examples of products.
Automotive applications are still dominating the MEMS pressure sensor market. TPMS, MAP and BAP will be the biggest sub applications in this field. Automotive, medical, industrial and high-end markets are growing 4- 7 percent, however the consumer market is growing 25 percent in value (38 percent in volume) because of new opportunities in smartphones and tablets.
MEMS pressure sensor finds new applications in each domain, for example: in-cylinder pressure sensing for automotive, CPAP (Continuous Positive Airway Pressure) machine for medical use, smartphone (Samsung Galaxy Slll for indoor navigation) and tablets for consumer electronics industry, etc. All these emerging applications are still in their infancy, but they appear promising and Yole Développement’s analysts believe MEMS pressure sensor will find new ways to satisfy end users in each domain.
MEMS technologies still gaining market share compared to other classic technologies
MEMS pressure sensors are showing advantages compared to other current technologies, such as ceramic thick-film, ceramic capacitive and thin-film technologies. In this report, you’ll read about a wide variety of pressure sensor technologies and how they are used in a broad range of applications.
Yole Développement has carried out an in-depth analysis of the applicable range of technologies and classified them based on the requirements of the major applications. Read how the increasing need for low cost, low power consumption and high accuracy in low pressure range sensors, drives MEMS pressure sensor development. Learn which applications have rising demand as the MEMS pressure sensor market grows from $1.9 billion in 2012 to $3 billion by 2018.
Technologies like thin-film are still needed for use in harsh environments, particularly with high temperatures and corrosive medias. MEMS pressure sensor manufacturers are also working on components which could be used in these environments. The status of SiC MEMS pressure sensor development is also described in the report.
Yole Développement analysis provides an overview of other existing pressure sensor technologies. Comparisons of different MEMS technologies are done in order to better understand the positioning of MEMS pressure sensors in the global market.
Fragmented market with more than 50 players involved
Since the MEMS pressure sensor market is huge, Yole Développement is not surprised to see a large number of players in this industry. It is one of the most fragmented markets.
More than 50 worldwide players are involved. The top five players (Bosch, Denso, Sensata, GE Sensing and Freescale) represent about 50 percent of the total market. Automotive, medical, industrial, and high-end markets already have their mature leaders and smaller companies following. The consumer electronics market is still emerging with some conventional MEMS sensor companies interested.
The report also includes a focus on the competition in the automotive market. Lots of companies are targeting this industry. Bosch has always dominated this sector. The supply chain of the automotive industry is complicated with different types of players: Car Manufacturers, Tier1 Automotive Part & Systems Suppliers (related to Pressure Sensors), Full Package Sensors Specialists and MEMS & Semiconductor Specialists.
This section of the report includes a detailed description at each level of the value chain and gives an in-depth supply chain analysis for the automotive market.
With new opportunities appearing in consumer electronics, new comers from the USA and China are targeting this segment. Yole Développement also follows the activities of some new Chinese challengers. Local Chinese companies are making an effort to try and fulfill the huge domestic demand in automotive and consumer applications.
In its new report MEMS Pressure Sensor, Yole Développement gives a detailed overview of the MEMS pressure sensor markets, technologies and players. This report details the main applications in automotive, consumer, medical, industrial and high-end segment, and the main players in the industry. It also analyses the current pressure sensor technologies including MEMS technologies, and gives a detailed MEMS pressure sensor market forecast by application.
Emerging consumer applications boosting growth of MEMS pressure sensor market and reshuffling main players
MEMS pressure sensor is one of the very first MEMS components appearing in the microsystem world. The technologies are quite mature and the market is big and expected to grow from $1.9 billion in 2012 to $3 billion in 2018.
“MEMS pressure sensor for consumer applications, especially for smartphones and tablets, is following the model of accelerometers and gyroscopes. Adoption of this model will help the MEMS pressure sensor market to boom again! We believe, this huge opportunity will result in the global volume of the MEMS pressure sensor market hitting 2.8 billion units by 2018” announces Wenbin Ding, Technology & Market Analyst, MEMS Devices & Technologies at Yole Développement.
”Consumer pressure sensor will represent 1.7 billion units and will overtake automotive as the market leader in volume!”, she adds. Even though the consumer application has a much lower ASP than other applications, this promising segment will bring more than 8 percent CAGR to the global MEMS pressure sensor market. Yole Développement carefully watches this market. This report has consolidated market data for 2012 and provides forecasts until 2018.
In this report, Yole Développement provides a global overview of the current MEMS pressure sensor technologies, market and competitive landscape. The covered industries in the MEMS pressure sensor 2013 report are automotive, industrial, medical applications, consumer electronics and high-end (aeronautic, military, defense) applications.
For each of the above, Yole Développement’s report gives a market description, examples of the main applications, current market data and forecasts, the main device manufacturers and examples of products.
Automotive applications are still dominating the MEMS pressure sensor market. TPMS, MAP and BAP will be the biggest sub applications in this field. Automotive, medical, industrial and high-end markets are growing 4- 7 percent, however the consumer market is growing 25 percent in value (38 percent in volume) because of new opportunities in smartphones and tablets.
MEMS pressure sensor finds new applications in each domain, for example: in-cylinder pressure sensing for automotive, CPAP (Continuous Positive Airway Pressure) machine for medical use, smartphone (Samsung Galaxy Slll for indoor navigation) and tablets for consumer electronics industry, etc. All these emerging applications are still in their infancy, but they appear promising and Yole Développement’s analysts believe MEMS pressure sensor will find new ways to satisfy end users in each domain.
MEMS technologies still gaining market share compared to other classic technologies
MEMS pressure sensors are showing advantages compared to other current technologies, such as ceramic thick-film, ceramic capacitive and thin-film technologies. In this report, you’ll read about a wide variety of pressure sensor technologies and how they are used in a broad range of applications.
Yole Développement has carried out an in-depth analysis of the applicable range of technologies and classified them based on the requirements of the major applications. Read how the increasing need for low cost, low power consumption and high accuracy in low pressure range sensors, drives MEMS pressure sensor development. Learn which applications have rising demand as the MEMS pressure sensor market grows from $1.9 billion in 2012 to $3 billion by 2018.
Technologies like thin-film are still needed for use in harsh environments, particularly with high temperatures and corrosive medias. MEMS pressure sensor manufacturers are also working on components which could be used in these environments. The status of SiC MEMS pressure sensor development is also described in the report.
Yole Développement analysis provides an overview of other existing pressure sensor technologies. Comparisons of different MEMS technologies are done in order to better understand the positioning of MEMS pressure sensors in the global market.
Fragmented market with more than 50 players involved
Since the MEMS pressure sensor market is huge, Yole Développement is not surprised to see a large number of players in this industry. It is one of the most fragmented markets.
More than 50 worldwide players are involved. The top five players (Bosch, Denso, Sensata, GE Sensing and Freescale) represent about 50 percent of the total market. Automotive, medical, industrial, and high-end markets already have their mature leaders and smaller companies following. The consumer electronics market is still emerging with some conventional MEMS sensor companies interested.
The report also includes a focus on the competition in the automotive market. Lots of companies are targeting this industry. Bosch has always dominated this sector. The supply chain of the automotive industry is complicated with different types of players: Car Manufacturers, Tier1 Automotive Part & Systems Suppliers (related to Pressure Sensors), Full Package Sensors Specialists and MEMS & Semiconductor Specialists.
This section of the report includes a detailed description at each level of the value chain and gives an in-depth supply chain analysis for the automotive market.
With new opportunities appearing in consumer electronics, new comers from the USA and China are targeting this segment. Yole Développement also follows the activities of some new Chinese challengers. Local Chinese companies are making an effort to try and fulfill the huge domestic demand in automotive and consumer applications.
GreenPeak launches GP501 ZigBee radio chip
THE NETHERLANDS: GreenPeak Technologies, a leading semiconductor company in low power RF communication, with a rich offering of communication solutions for Smart Home applications, announced the GP501, a new generation of ZigBee transceivers which contains a sophisticated coexistence scheme that allows Wi-Fi, Bluetooth and ZigBee chips to work side by side in the same device.
The GP501 also contains Deep Packet Inspection allowing deep sleep modes of set-top boxes and other host devices by means of Wake-on-LAN messages.
ZigBee shares the 2.4 GHz frequency band with other Wi-Fi equipment. The GP501 has a coexistence interface to allow optimized and co-located ZigBee/Wi-Fi radios to work in the same device, successfully avoiding RF interference when operating simultaneously. This coexistence interface enables arbitration over the shared radio frequency medium to prevent contention, signal degradation and data loss.
Another advantage of the GP501 is its small size: its 32-pin 5x5 mm2 footprint allows integration into even the smallest product form-factors.
A new key feature of the GP501 ZigBee transceiver chip is the Deep Packet Inspection for ZigBee applications. Deep Packet Inspection (DPI) enables advanced packet management, allowing the host processor to go into a deep-sleep mode to conserve power.
While most other ZigBee transceiver chips only include a superficial inspection of the MAC and PHY headers, the GP501 looks beyond these layers and executes a Deep Packet Inspection and based on the outcome, the chip can decide if the packet has to be passed on to the higher layer application or can be ignored.
The DPI engine is also security aware, blocking unauthorized packets without involving the host processor and ensuring the system does not waste energy analyzing non-compliant packets. The DPI feature can be used for Wake-on-LAN functionality, where ultra-low power ZigBee is used to wake up the main processor from its sleep mode to enable Wi-Fi networking.
“The Wi-Fi Coexistence Interface and Deep Packet Inspection enabling Wake-on-LAN are new and exciting features of the GP501,” says Cees Links, CEO of GreenPeak Technologies “These features make the GP501 the optimal choice for the set-top box/gateway market. With its small 32-pin footprint, the GP501 is a great successor to the already very successful GP500. Once again GreenPeak is leading the industry in adding smart functionality and superior performance to its ZigBee devices.”
“Smart home networks will incorporate a variety of wireless technologies – all working in the same space,” says Bill Ablondi, director of Strategy Analytics’ Smart Home Strategies advisory service.
“Having reliable and robust resistance to possible interference in the 2.4 GHz band enables set top box makers to create compact solutions that can support wireless Smart Home networks employing ZigBee for sensor and control networks and Wi-Fi for high volume content and entertainment networks. GreenPeak’s new generation of compact ZigBee transceivers provides a comfort zone for developers.”
The GP501 also contains Deep Packet Inspection allowing deep sleep modes of set-top boxes and other host devices by means of Wake-on-LAN messages.
ZigBee shares the 2.4 GHz frequency band with other Wi-Fi equipment. The GP501 has a coexistence interface to allow optimized and co-located ZigBee/Wi-Fi radios to work in the same device, successfully avoiding RF interference when operating simultaneously. This coexistence interface enables arbitration over the shared radio frequency medium to prevent contention, signal degradation and data loss.
Another advantage of the GP501 is its small size: its 32-pin 5x5 mm2 footprint allows integration into even the smallest product form-factors.
A new key feature of the GP501 ZigBee transceiver chip is the Deep Packet Inspection for ZigBee applications. Deep Packet Inspection (DPI) enables advanced packet management, allowing the host processor to go into a deep-sleep mode to conserve power.
While most other ZigBee transceiver chips only include a superficial inspection of the MAC and PHY headers, the GP501 looks beyond these layers and executes a Deep Packet Inspection and based on the outcome, the chip can decide if the packet has to be passed on to the higher layer application or can be ignored.
The DPI engine is also security aware, blocking unauthorized packets without involving the host processor and ensuring the system does not waste energy analyzing non-compliant packets. The DPI feature can be used for Wake-on-LAN functionality, where ultra-low power ZigBee is used to wake up the main processor from its sleep mode to enable Wi-Fi networking.
“The Wi-Fi Coexistence Interface and Deep Packet Inspection enabling Wake-on-LAN are new and exciting features of the GP501,” says Cees Links, CEO of GreenPeak Technologies “These features make the GP501 the optimal choice for the set-top box/gateway market. With its small 32-pin footprint, the GP501 is a great successor to the already very successful GP500. Once again GreenPeak is leading the industry in adding smart functionality and superior performance to its ZigBee devices.”
“Smart home networks will incorporate a variety of wireless technologies – all working in the same space,” says Bill Ablondi, director of Strategy Analytics’ Smart Home Strategies advisory service.
“Having reliable and robust resistance to possible interference in the 2.4 GHz band enables set top box makers to create compact solutions that can support wireless Smart Home networks employing ZigBee for sensor and control networks and Wi-Fi for high volume content and entertainment networks. GreenPeak’s new generation of compact ZigBee transceivers provides a comfort zone for developers.”
TI adds more memory, flexible package options and general purpose IO pins to its MSP430 Value Line MCUs
USA: Further advancing its low-cost portfolio, Texas Instruments Inc. (TI) announced the expansion of the MSP430 Value Line microcontroller series with new G2xx4 and G2xx5 devices.
These new devices offer a code-compatible upgrade path for TI's MSP430 Value Line series, expanding memory from 16kB up to 56kB Flash and up to 4kB SRAM, enabling customers to migrate existing solutions and support connectivity protocols such as wireless MBUS and near field communications (NFC).
By combining the increased memory resources and integrated capacitive touch IOs on the MSP430G2xx5 devices, developers can implement more sophisticated capacitive touch capabilities like swipe, gesturing, double tap and proximity effects within their applications. Developers can also add reliable high bit-rate serial communications to designs by taking advantage of the G2xx4 and G2xx5 microcontrollers' high-frequency crystal input, another first for the MSP430 Value Line.
For design flexibility within space-constrained applications, the new devices will be available in the MSP portfolio's smallest package, die-sized ball grid array (DSBGA). Additionally, MSP430G2xx4 and G2xx5 devices provide more GPIOs, timers and serial ports to ensure developers do not sacrifice performance for cost.
These new devices offer a code-compatible upgrade path for TI's MSP430 Value Line series, expanding memory from 16kB up to 56kB Flash and up to 4kB SRAM, enabling customers to migrate existing solutions and support connectivity protocols such as wireless MBUS and near field communications (NFC).
By combining the increased memory resources and integrated capacitive touch IOs on the MSP430G2xx5 devices, developers can implement more sophisticated capacitive touch capabilities like swipe, gesturing, double tap and proximity effects within their applications. Developers can also add reliable high bit-rate serial communications to designs by taking advantage of the G2xx4 and G2xx5 microcontrollers' high-frequency crystal input, another first for the MSP430 Value Line.
For design flexibility within space-constrained applications, the new devices will be available in the MSP portfolio's smallest package, die-sized ball grid array (DSBGA). Additionally, MSP430G2xx4 and G2xx5 devices provide more GPIOs, timers and serial ports to ensure developers do not sacrifice performance for cost.
Renesas to extend line-up of digital broadcast reception middleware for automotive SoC devices
JAPAN: Renesas Electronics Corp. announced the development of digital TV broadcast reception middleware products for automotive SoC devices: a new ISDB-TB (Integrated Service Digital Broadcasting—Terrestrial Brazil) (One-Seg) broadcast reception, middleware product for the Brazilian market and the addition of the new “content protection system” standard for Japan to the ISDB-T (Integrated Service Digital Broadcasting—Terrestrial) (Full-Seg) broadcast reception middleware product. Both products will be available starting in April 2013.
The adoption of digital television broadcasting is advancing at a rapid pace worldwide. In Brazil in particular, the ISDB-TB system, which is based on the terrestrial digital broadcasting system used in Japan (ISDB-T), has been selected, and analog TV broadcasting is scheduled to be discontinued in 2016.
Major world-class sporting events such as the World Cup in 2014 in the Olympics in 2016, combined with the continued expansion of the country’s economy, have led to an acceleration in the purchase of digital TVs to replace existing analog sets as well as a rise in demand for vehicle information systems incorporating digital TV functionality.
In Japan, in addition to the existing reception control system employing IC cards (B-CAS cards), a new reception control system: “content protection system” standard that does not utilize an IC card is standardized and adopted. The new system is scheduled to enter widespread use in April 2013, and it is expected to bring enhanced convenience alongside reduced system cost.
The adoption of digital television broadcasting is advancing at a rapid pace worldwide. In Brazil in particular, the ISDB-TB system, which is based on the terrestrial digital broadcasting system used in Japan (ISDB-T), has been selected, and analog TV broadcasting is scheduled to be discontinued in 2016.
Major world-class sporting events such as the World Cup in 2014 in the Olympics in 2016, combined with the continued expansion of the country’s economy, have led to an acceleration in the purchase of digital TVs to replace existing analog sets as well as a rise in demand for vehicle information systems incorporating digital TV functionality.
In Japan, in addition to the existing reception control system employing IC cards (B-CAS cards), a new reception control system: “content protection system” standard that does not utilize an IC card is standardized and adopted. The new system is scheduled to enter widespread use in April 2013, and it is expected to bring enhanced convenience alongside reduced system cost.
IDT announces world’s lowest jitter MEMS oscillators with integrated frequency margining capability
USA: Integrated Device Technology Inc. (IDT) has announced the industry’s first differential MEMS oscillators with 100 femtosecond (fs) typical phase jitter performance and integrated frequency margining capability.
The extremely low phase jitter and adaptable output frequency of IDT’s high-performance oscillators significantly reduce bit error rate (BER) in 10 gigabit Ethernet (10GbE) switches, routers, and other related networking equipment.
The IDT 4H performance MEMS oscillators feature a differential LVDS / LVPECL output and the lowest phase jitter in their product class (100 fs @ 1.875 - 20 MHz and sub-300 fs @ 12kHz - 20 MHz), satisfying the low-jitter chipset requirements of high-performance networking applications. Integrated frequency margining capability enables customers to fine-tune the oscillator frequency during operation in the application by up to ±1000 ppm, minimizing BER and facilitating margin testing.
IDT’s 4H MEMS oscillators are available in multiple package sizes including the smaller 3225 (3.2 x 2.5 mm) to save board space and cost in densely populated applications. IDT is the only supplier to offer this combination of MEMS oscillator performance, features, and small package size.
The extremely low phase jitter and adaptable output frequency of IDT’s high-performance oscillators significantly reduce bit error rate (BER) in 10 gigabit Ethernet (10GbE) switches, routers, and other related networking equipment.
The IDT 4H performance MEMS oscillators feature a differential LVDS / LVPECL output and the lowest phase jitter in their product class (100 fs @ 1.875 - 20 MHz and sub-300 fs @ 12kHz - 20 MHz), satisfying the low-jitter chipset requirements of high-performance networking applications. Integrated frequency margining capability enables customers to fine-tune the oscillator frequency during operation in the application by up to ±1000 ppm, minimizing BER and facilitating margin testing.
IDT’s 4H MEMS oscillators are available in multiple package sizes including the smaller 3225 (3.2 x 2.5 mm) to save board space and cost in densely populated applications. IDT is the only supplier to offer this combination of MEMS oscillator performance, features, and small package size.
Xilinx extends leadership in avionics with certifiable, All Programmable design solutions and dedicated support
USA: Xilinx Inc. announced its comprehensive solutions and support to address complex avionics certification challenges. Xilinx’s DO-254, DO-178, and SEU mitigation solutions build upon its long history of leadership in military avionics and secure solutions to extend support for certification of commercial, military and dual-use avionics systems.
These solutions are now enabling the latest advancements in avionics applications with Xilinx’s generation-ahead 28nm devices, including 7 series FPGAs and Zynq-7000 All Programmable system-on-a-chip (SoCs).
“We are pleased to be offering unsurpassed support for the commercial avionics market with certifiable solutions that enable use of our latest generation of 28nm FPGAs and All Programmable SoCs for future airborne systems,” said Yousef Khalilollahi, senior director, Aerospace and Defense at Xilinx. “These solutions allow our customers to build high performance, all programmable solutions with reduced certification burden and product development cost.”
Xilinx has established an industry-leading commercial avionics solutions portfolio over the past several years. Through key partnerships with LogiCircuit, Inc., certification representatives, and other IP vendors, Xilinx is rolling out a certifiable IP ecosystem. DO-254 certifiable versions of configurable IP cores include Xilinx’s MicroBlaze soft processor, Great River Technologies’ ARINC 818 core, other standard avionics interfaces, and many AXI peripherals.
The first end-system to utilize several of these cores is expected to enter certification in late 2013. These DO-254 and DO-178 certifiable data packages meet rigorous commercial avionics certification standards, thereby reducing design and development time, certification burden, and non-recurring engineering costs.
These solutions are now enabling the latest advancements in avionics applications with Xilinx’s generation-ahead 28nm devices, including 7 series FPGAs and Zynq-7000 All Programmable system-on-a-chip (SoCs).
“We are pleased to be offering unsurpassed support for the commercial avionics market with certifiable solutions that enable use of our latest generation of 28nm FPGAs and All Programmable SoCs for future airborne systems,” said Yousef Khalilollahi, senior director, Aerospace and Defense at Xilinx. “These solutions allow our customers to build high performance, all programmable solutions with reduced certification burden and product development cost.”
Xilinx has established an industry-leading commercial avionics solutions portfolio over the past several years. Through key partnerships with LogiCircuit, Inc., certification representatives, and other IP vendors, Xilinx is rolling out a certifiable IP ecosystem. DO-254 certifiable versions of configurable IP cores include Xilinx’s MicroBlaze soft processor, Great River Technologies’ ARINC 818 core, other standard avionics interfaces, and many AXI peripherals.
The first end-system to utilize several of these cores is expected to enter certification in late 2013. These DO-254 and DO-178 certifiable data packages meet rigorous commercial avionics certification standards, thereby reducing design and development time, certification burden, and non-recurring engineering costs.
Renesas announces R-Car H2
USA: Renesas Electronics Corp. and Renesas Mobile Corp. have announced the availability of a new member of the R-Car Series of automotive Systems-on-Chip (SoCs). Capable of delivering more than 25,000 DMIPS, the R-Car H2 provides high performance and state-of-the-art 3D graphics capabilities for high-end multimedia and navigation automotive systems.
The R-Car H2 is powered by the ARM CortexA-15 quad-core configuration running an additional ARM CortexA-7 quad-core – the industry’s first implementation of a Quad ARM Cortex A15 and the big.LITTLE processing technique in an automotive SoC.
Powerful media hardware accelerators enable features like 4 x HD 1080p video en/decoding including Blu-Ray support at 60 frames per second, image/voice recognition and high-resolution 3D graphics with almost no CPU load. These implemented hardware modules also execute the display content improvements needed for human-machine interface (HMI)/navigation data in parallel to Movie/DVD handling.
The R-Car H2 also features the Imagination Technologies PowerVR Series6 G6400 Graphics Processing Unit (GPU). This is the first worldwide implementation of the GPU into an automotive SoC, which demonstrates the state-of-the-art 3D graphics capability of the R-Car series.
The R-Car H2 offers one of the best graphic performance solutions in the automotive embedded market. This GPU is ready to not only support open technologies like OpenGL ES 2.0, but also the OpenGL ES 3.0 and OpenCL standards. Support of the Open graphics standards combined with the R-Car H2’s cutting-edge IP and other features makes it the perfect platform to develop next-generation infotainment systems.
Renesas’ IMP-X4 core, implemented in R-Car H2 as an optional feature, provides real-time image processing that enables developers to support the emerging trend of augmented reality. In order to fully benefit from the IMP-X4 core, the R-Car H2 also supports up to four independent input camera channels, allowing easy implementations of 360º camera views and image recognition, just an example of the possible driver assistance functions. OpenCV support for IMP-X4 will also be offered. The R-Car H2 offers the highest level of integration of advanced safety concepts and infotainment features in the automotive market today.
The highly efficient bus architecture of the R-Car H2 includes dedicated CPU and IP caches, enabling Renesas to reduce the DDR3 memory bandwidth consumption. In order to ensure adequate memory bandwidth, the R-Car H2 is equipped with two independent DDR3-1600 32-bit interfaces. This allows for much more efficient access to different content simultaneously, compared to a single 64-bit DDR interface. The R-Car family aspires to provide users with the highest capable multitasking processing solution on the automotive market today.
In developing the R-Car series of SoCs, Renesas has leveraged the experiences with mobile products, where there is a strong focus on power consumption reductions. The applied technologies of these mobile products are transferred to Renesas’ automotive SoCs to provide unique and effective power optimization and handling.
The R-Car H2 integrates advanced automotive interfaces like Ethernet AVB, MOST-150 and CAN and mass storage interfaces like SATA, USB3.0/2.0, SDcard and PCI Express for system expansion. As a device option, the GPS baseband engine handles all modern navigation standards. Even here, the integration level of R-Car H2 doesn’t stop. A 24-bit DSP for codec, high-quality audio processing with hardware sample rate converters and audio mixing is part of the enormous function coverage.
The Renesas R-Car family provides the highest level of advanced automotive peripherals in the market today. The Renesas Ethernet AVB solution achieves the fullest implementation of Ethernet AVB on the market, offering the Full Ethernet AVB specification and meeting the specification requirement demands of the automotive market.
With the R-Car H2, Renesas provides not only extremely powerful performance but also a robust ecosystem, including board support packages (BSPs), middleware, development environment and partner solutions, which enables quick prototyping and drastic reduction of high-end product development costs.
The R-Car H2 is powered by the ARM CortexA-15 quad-core configuration running an additional ARM CortexA-7 quad-core – the industry’s first implementation of a Quad ARM Cortex A15 and the big.LITTLE processing technique in an automotive SoC.
Powerful media hardware accelerators enable features like 4 x HD 1080p video en/decoding including Blu-Ray support at 60 frames per second, image/voice recognition and high-resolution 3D graphics with almost no CPU load. These implemented hardware modules also execute the display content improvements needed for human-machine interface (HMI)/navigation data in parallel to Movie/DVD handling.
The R-Car H2 also features the Imagination Technologies PowerVR Series6 G6400 Graphics Processing Unit (GPU). This is the first worldwide implementation of the GPU into an automotive SoC, which demonstrates the state-of-the-art 3D graphics capability of the R-Car series.
The R-Car H2 offers one of the best graphic performance solutions in the automotive embedded market. This GPU is ready to not only support open technologies like OpenGL ES 2.0, but also the OpenGL ES 3.0 and OpenCL standards. Support of the Open graphics standards combined with the R-Car H2’s cutting-edge IP and other features makes it the perfect platform to develop next-generation infotainment systems.
Renesas’ IMP-X4 core, implemented in R-Car H2 as an optional feature, provides real-time image processing that enables developers to support the emerging trend of augmented reality. In order to fully benefit from the IMP-X4 core, the R-Car H2 also supports up to four independent input camera channels, allowing easy implementations of 360º camera views and image recognition, just an example of the possible driver assistance functions. OpenCV support for IMP-X4 will also be offered. The R-Car H2 offers the highest level of integration of advanced safety concepts and infotainment features in the automotive market today.
The highly efficient bus architecture of the R-Car H2 includes dedicated CPU and IP caches, enabling Renesas to reduce the DDR3 memory bandwidth consumption. In order to ensure adequate memory bandwidth, the R-Car H2 is equipped with two independent DDR3-1600 32-bit interfaces. This allows for much more efficient access to different content simultaneously, compared to a single 64-bit DDR interface. The R-Car family aspires to provide users with the highest capable multitasking processing solution on the automotive market today.
In developing the R-Car series of SoCs, Renesas has leveraged the experiences with mobile products, where there is a strong focus on power consumption reductions. The applied technologies of these mobile products are transferred to Renesas’ automotive SoCs to provide unique and effective power optimization and handling.
The R-Car H2 integrates advanced automotive interfaces like Ethernet AVB, MOST-150 and CAN and mass storage interfaces like SATA, USB3.0/2.0, SDcard and PCI Express for system expansion. As a device option, the GPS baseband engine handles all modern navigation standards. Even here, the integration level of R-Car H2 doesn’t stop. A 24-bit DSP for codec, high-quality audio processing with hardware sample rate converters and audio mixing is part of the enormous function coverage.
The Renesas R-Car family provides the highest level of advanced automotive peripherals in the market today. The Renesas Ethernet AVB solution achieves the fullest implementation of Ethernet AVB on the market, offering the Full Ethernet AVB specification and meeting the specification requirement demands of the automotive market.
With the R-Car H2, Renesas provides not only extremely powerful performance but also a robust ecosystem, including board support packages (BSPs), middleware, development environment and partner solutions, which enables quick prototyping and drastic reduction of high-end product development costs.
Scientists discover new atomic technique to charge memory chips
USA: IBM announced a materials science breakthrough at the atomic level that could pave the way for a new class of non-volatile memory and logic chips that would use less power than today's silicon based devices.
Rather than using conventional electrical means that operate today's semiconducting devices, IBM's scientists discovered a new way to operate chips using tiny ionic currents, which are streams of charged atoms that could mimic the event-driven way in which the human brain operates.
Today's computers typically use semiconductors made with CMOS process technologies and it was long thought that these chips would double in performance and decrease in size and cost every two years. But the materials and techniques to develop and build CMOS chips are rapidly approaching physical and performance limitations and new solutions may soon be needed to develop high performance and low-power devices.
IBM research scientists showed that it is possible to reversibly transform metal oxides between insulating and conductive states by the insertion and removal of oxygen ions driven by electric fields at oxide-liquid interfaces. Once the oxide materials, which are innately insulating, are transformed into a conducting state, the IBM experiments showed that the materials maintain a stable metallic state even when power to the device is removed.
This non-volatile property means that chips using devices that operate using this novel phenomenon could be used to store and transport data in a more efficient, event-driven manner instead of requiring the state of the devices to be maintained by constant electrical currents.
"Our ability to understand and control matter at atomic scale dimensions allows us to engineer new materials and devices that operate on entirely different principles than the silicon based information technologies of today," said Dr. Stuart Parkin, an IBM Fellow at IBM Research.
"Going beyond today's charge-based devices to those that use miniscule ionic currents to reversibly control the state of matter has the potential for new types of mobile devices. Using these devices and concepts in novel three-dimensional architectures could prevent the information technology industry from hitting a technology brick wall."
To achieve this breakthrough, IBM researchers applied a positively charged ionic liquid electrolyte to an insulating oxide material - vanadium dioxide - and successfully converted the material to a metallic state. The material held its metallic state until a negatively charged ionic liquid electrolyte was applied, to convert it back to its original, insulating state.
Such metal to insulator transition materials have been extensively researched for a number of years. However, contrary to earlier conclusions, IBM discovered that it is the removal and injection of oxygen into the metal oxides that is responsible for the changes in state of the oxide material when subjected to intense electric fields.
The transition from a conducting state to an insulating state has also previously been obtained by changing the temperature or applying an external stress, both of which do not lend themselves to device applications.
Rather than using conventional electrical means that operate today's semiconducting devices, IBM's scientists discovered a new way to operate chips using tiny ionic currents, which are streams of charged atoms that could mimic the event-driven way in which the human brain operates.
Today's computers typically use semiconductors made with CMOS process technologies and it was long thought that these chips would double in performance and decrease in size and cost every two years. But the materials and techniques to develop and build CMOS chips are rapidly approaching physical and performance limitations and new solutions may soon be needed to develop high performance and low-power devices.
IBM research scientists showed that it is possible to reversibly transform metal oxides between insulating and conductive states by the insertion and removal of oxygen ions driven by electric fields at oxide-liquid interfaces. Once the oxide materials, which are innately insulating, are transformed into a conducting state, the IBM experiments showed that the materials maintain a stable metallic state even when power to the device is removed.
This non-volatile property means that chips using devices that operate using this novel phenomenon could be used to store and transport data in a more efficient, event-driven manner instead of requiring the state of the devices to be maintained by constant electrical currents.
"Our ability to understand and control matter at atomic scale dimensions allows us to engineer new materials and devices that operate on entirely different principles than the silicon based information technologies of today," said Dr. Stuart Parkin, an IBM Fellow at IBM Research.
"Going beyond today's charge-based devices to those that use miniscule ionic currents to reversibly control the state of matter has the potential for new types of mobile devices. Using these devices and concepts in novel three-dimensional architectures could prevent the information technology industry from hitting a technology brick wall."
To achieve this breakthrough, IBM researchers applied a positively charged ionic liquid electrolyte to an insulating oxide material - vanadium dioxide - and successfully converted the material to a metallic state. The material held its metallic state until a negatively charged ionic liquid electrolyte was applied, to convert it back to its original, insulating state.
Such metal to insulator transition materials have been extensively researched for a number of years. However, contrary to earlier conclusions, IBM discovered that it is the removal and injection of oxygen into the metal oxides that is responsible for the changes in state of the oxide material when subjected to intense electric fields.
The transition from a conducting state to an insulating state has also previously been obtained by changing the temperature or applying an external stress, both of which do not lend themselves to device applications.
Monday, March 25, 2013
Unity collaborates with Qualcomm to optimize development platform
USA: Unity Technologies, provider of the Unity multi-platform engine and development tools, and Qualcomm Technologies Inc. announced that Unity Technologies will be optimizing its multi-platform engine in the coming months in collaboration with Qualcomm Technologies.
These modifications will help improve the performance of Unity-authored games and applications running on mobile devices powered by a wide variety of Qualcomm Snapdragon processors from Qualcomm Technologies.
As a result, developers will have a unique opportunity to create and deploy dynamic gaming experiences with high-end visuals on various Snapdragon processor-based devices. As part of this collaboration, Unity Technologies also will be making available enhanced and optimized mobile games for certain Snapdragon processor-based devices. Snapdragon users can look forward to new, Unity-based games later this year.
To date, Qualcomm Snapdragon processors, with integrated Adreno GPUs, can be found in more than 770 commercially available or announced products, with another 450 product designs in the pipeline.
Available in a range of features and configurations, Qualcomm Snapdragon processors enable great gaming experiences across a large spectrum of devices, from entry-level smartphones to high-end smartphones and tablets. As a result, this collaboration will help empower Unity Technologies' global community of more than 1.5 million registered developers to create better mobile gaming experiences with advanced graphics for many Snapdragon-based Android and Windows devices across the world.
"Qualcomm Technologies is passionate about mobile gaming, so we're very excited to be working with an industry leader in game engine and tool technologies such as Unity Technologies," said Raj Talluri, senior VP of product management at Qualcomm. "This collaboration will allow the two companies to optimize the strength of Unity's powerful rendering engine with the integrated OpenGL ES 3.0 compliant Adreno GPUs and high performance multi-core CPUs of the Qualcomm Snapdragon processor. As a result, this will help bring exceptional gaming experiences to consumers."
"As an industry leader in mobile gaming, Unity Technologies is constantly looking to improve the quality and robustness of its multi-platform engine and development tools for Unity's developer community," said David Helgason, CEO of Unity Technologies. "We're excited to work with an innovative global mobile technology provider such as Qualcomm Technologies and support their incredible Snapdragon processors, which are at the heart of many Android and Windows mobile devices across the globe."
These modifications will help improve the performance of Unity-authored games and applications running on mobile devices powered by a wide variety of Qualcomm Snapdragon processors from Qualcomm Technologies.
As a result, developers will have a unique opportunity to create and deploy dynamic gaming experiences with high-end visuals on various Snapdragon processor-based devices. As part of this collaboration, Unity Technologies also will be making available enhanced and optimized mobile games for certain Snapdragon processor-based devices. Snapdragon users can look forward to new, Unity-based games later this year.
To date, Qualcomm Snapdragon processors, with integrated Adreno GPUs, can be found in more than 770 commercially available or announced products, with another 450 product designs in the pipeline.
Available in a range of features and configurations, Qualcomm Snapdragon processors enable great gaming experiences across a large spectrum of devices, from entry-level smartphones to high-end smartphones and tablets. As a result, this collaboration will help empower Unity Technologies' global community of more than 1.5 million registered developers to create better mobile gaming experiences with advanced graphics for many Snapdragon-based Android and Windows devices across the world.
"Qualcomm Technologies is passionate about mobile gaming, so we're very excited to be working with an industry leader in game engine and tool technologies such as Unity Technologies," said Raj Talluri, senior VP of product management at Qualcomm. "This collaboration will allow the two companies to optimize the strength of Unity's powerful rendering engine with the integrated OpenGL ES 3.0 compliant Adreno GPUs and high performance multi-core CPUs of the Qualcomm Snapdragon processor. As a result, this will help bring exceptional gaming experiences to consumers."
"As an industry leader in mobile gaming, Unity Technologies is constantly looking to improve the quality and robustness of its multi-platform engine and development tools for Unity's developer community," said David Helgason, CEO of Unity Technologies. "We're excited to work with an innovative global mobile technology provider such as Qualcomm Technologies and support their incredible Snapdragon processors, which are at the heart of many Android and Windows mobile devices across the globe."
Algotochip becomes Tensilica design center partner
USA: Tensilica Inc. announced that Algotochip has joined its Xtensions partner network and will offer design services that incorporate Tensilica's DPUs (dataplane processor units).
Algotochip now has access to Tensilica's technology to help it market and deploy innovative solutions that will enable developers to get their Tensilica-based products to market faster.
"The digital solution we provide is unique to the individual customer and completely owned by that customer," said Didier Boivin, Algotochip's VP of marketing.
"Once we receive the C-code and test-vectors to verify it, Algotochip does all the work involved in creating a complete digital solution including all the necessary software and firmware for the Tensilica DPUs. The customer doesn't have to learn any new tools and can focus on the product specification and algorithms -- realizing the digital solution through our relationship."
Algotochip's patented approach can speed hardware and software design for SOCs (systems on chip) in as little as eight weeks. Algotochip guarantees that its SOC meets all the performance specifications made by the customers, and ensures that it will be right the first time.
"We are delighted to add Algotochip to our design center partner program," stated Chris Jones, Tensilica's director of product marketing. "They have extensive expertise in many areas of chip design and can help customers get their chips to market much faster."
Algotochip now has access to Tensilica's technology to help it market and deploy innovative solutions that will enable developers to get their Tensilica-based products to market faster.
"The digital solution we provide is unique to the individual customer and completely owned by that customer," said Didier Boivin, Algotochip's VP of marketing.
"Once we receive the C-code and test-vectors to verify it, Algotochip does all the work involved in creating a complete digital solution including all the necessary software and firmware for the Tensilica DPUs. The customer doesn't have to learn any new tools and can focus on the product specification and algorithms -- realizing the digital solution through our relationship."
Algotochip's patented approach can speed hardware and software design for SOCs (systems on chip) in as little as eight weeks. Algotochip guarantees that its SOC meets all the performance specifications made by the customers, and ensures that it will be right the first time.
"We are delighted to add Algotochip to our design center partner program," stated Chris Jones, Tensilica's director of product marketing. "They have extensive expertise in many areas of chip design and can help customers get their chips to market much faster."
Peregrine's UltraCMOS RFICs flying in Globalstar communication satellites
USA: Peregrine Semiconductor Corp. announced that its UltraCMOS Phase Locked Loop (PLL) frequency synthesizer and prescaler devices are designed into six Globalstar mobile communication satellites that were launched into orbit on February 6.
Built by Thales Alenia Space in France, the low-Earth orbit satellites transmit audio and data communications for Globalstar’s mobile voice and data customers worldwide. Peregrine’s PLL and prescaler enable communication in sixteen C- and S-band transponders in the system, which connects end users with terrestrial communication networks via vehicle-mounted mobile devices, as well as fixed terminals, such as those used for rural telephony.
The Peregrine devices feature extremely low phase noise and Single Event Effect (SEE) immunity — attributes enabled by the insulating properties of UltraCMOS process technology — as well as low power, small form factor, and light weight.
Single Event Effects are errors that are caused by naturally-occurring space-based radiation. There are two primary types of SEEs. Single Event Upsets (SEUs) are non-destructive and can be corrected. Single Event Latchups (SELs), on the other hand, are often catastrophic, resulting in permanent damage and requiring, at a minimum, a power-down to recover.
SELs can occur when a high-energy particle strikes a semiconductor device, causing a short circuit from power to ground within the device. RFICs manufactured using UltraCMOS technology do not contain the bulk parasitics found in regular CMOS devices, making latchup impossible.
Peregrine’s UltraCMOS technology is an advanced RF Silicon-On-Insulator process that utilizes a synthetic sapphire substrate — a near-perfect electrical insulator. This substrate enables low parasitic capacitance, high signal isolation, excellent broadband linearity, and inherent SEL immunity. These attributes make UltraCMOS well suited for high-reliability applications, such as commercial satellites.
Built by Thales Alenia Space in France, the low-Earth orbit satellites transmit audio and data communications for Globalstar’s mobile voice and data customers worldwide. Peregrine’s PLL and prescaler enable communication in sixteen C- and S-band transponders in the system, which connects end users with terrestrial communication networks via vehicle-mounted mobile devices, as well as fixed terminals, such as those used for rural telephony.
The Peregrine devices feature extremely low phase noise and Single Event Effect (SEE) immunity — attributes enabled by the insulating properties of UltraCMOS process technology — as well as low power, small form factor, and light weight.
Single Event Effects are errors that are caused by naturally-occurring space-based radiation. There are two primary types of SEEs. Single Event Upsets (SEUs) are non-destructive and can be corrected. Single Event Latchups (SELs), on the other hand, are often catastrophic, resulting in permanent damage and requiring, at a minimum, a power-down to recover.
SELs can occur when a high-energy particle strikes a semiconductor device, causing a short circuit from power to ground within the device. RFICs manufactured using UltraCMOS technology do not contain the bulk parasitics found in regular CMOS devices, making latchup impossible.
Peregrine’s UltraCMOS technology is an advanced RF Silicon-On-Insulator process that utilizes a synthetic sapphire substrate — a near-perfect electrical insulator. This substrate enables low parasitic capacitance, high signal isolation, excellent broadband linearity, and inherent SEL immunity. These attributes make UltraCMOS well suited for high-reliability applications, such as commercial satellites.
Synopsys speeds timing closure with advanced signoff-driven ECO guidance
USA: Synopsys Inc. has announced the immediate availability of its PrimeTime ADV solution, a new configuration of its market-leading PrimeTime static timing analysis and signoff product.
PrimeTime ADV includes advanced leakage recovery and will incorporate physical-aware signoff-driven engineering change order (ECO) guidance technology, which work in conjunction with the latest innovations for Synopsys' IC Compiler solution to enable the fastest path to timing closure and the lowest leakage power for gigahertz IC design implementation.
Advanced designs using deep submicron process technology, especially those using FD-SOI and 3-D structures, are undergoing an evolution as Moore's law drives device integration, challenging performance and power scalability to keep pace. Chips are packing more and more functionality, leading to high cell utilization complicated by stringent power and margin requirements. These challenges stress the timing closure cycle, leading to more ECO iterations.
"Strong ECO support with tight links between signoff timing and place and route technologies has emerged as a key requirement for our next-generation 28 nm FDSOI designs to achieve timing closure on schedule," said Indavong Vongsavady, director, Central CAD & Design Solutions at STMicroelectronics Technology R&D.
"PrimeTime ECO's scalability, with its lightweight infrastructure and its aggressive leakage recovery algorithms, tightly coupled with IC Compiler's versatility to implement the ECO guidance, is the optimal approach for advanced timing closure."
Built on patented PrimeTime ECO technology, the new leakage and physical-aware ECO enhancements are easy to integrate into the existing flow, enabling the fastest ECO cycle in the least number of iterations. With knowledge of the physical environment gained in PrimeTime, improved ECO choices can be made and physical-aware ECO guidance will be provided to the place and route tool.
IC Compiler uses enhanced guidance to make more informed placement and routing decisions, and to minimize the physical impact of the ECO, which results in less iterations. Complementing IC Compiler's low power and leakage optimization capabilities, PrimeTime ADV extends leakage recovery to signoff analysis, enabling lower power consumption while preserving signoff timing across multiple mode and process corner scenarios.
"Increasing design functionality, timing and power closure, and rigid tapeout schedules are key challenges for signoff at new process geometries," said Jacob Avidan, VP of engineering for static timing products at Synopsys. "PrimeTime ADV provides a leap forward in designer productivity, enabling the lowest leakage power and highest frequency designs to meet today's aggressive design schedules."
A PrimeTime Special Interest Group (SIG) event will be held on March 26th during SNUG (Synopsys Users Group) Silicon Valley in Santa Clara, Calif., to highlight the new timing features. PrimeTime R&D will present the PrimeTime ADV technologies, and timing experts will share their experiences.
PrimeTime ECO leakage recovery is available now. Physical-aware ECO will be available in the June 2013 PrimeTime release.
PrimeTime ADV includes advanced leakage recovery and will incorporate physical-aware signoff-driven engineering change order (ECO) guidance technology, which work in conjunction with the latest innovations for Synopsys' IC Compiler solution to enable the fastest path to timing closure and the lowest leakage power for gigahertz IC design implementation.
Advanced designs using deep submicron process technology, especially those using FD-SOI and 3-D structures, are undergoing an evolution as Moore's law drives device integration, challenging performance and power scalability to keep pace. Chips are packing more and more functionality, leading to high cell utilization complicated by stringent power and margin requirements. These challenges stress the timing closure cycle, leading to more ECO iterations.
"Strong ECO support with tight links between signoff timing and place and route technologies has emerged as a key requirement for our next-generation 28 nm FDSOI designs to achieve timing closure on schedule," said Indavong Vongsavady, director, Central CAD & Design Solutions at STMicroelectronics Technology R&D.
"PrimeTime ECO's scalability, with its lightweight infrastructure and its aggressive leakage recovery algorithms, tightly coupled with IC Compiler's versatility to implement the ECO guidance, is the optimal approach for advanced timing closure."
Built on patented PrimeTime ECO technology, the new leakage and physical-aware ECO enhancements are easy to integrate into the existing flow, enabling the fastest ECO cycle in the least number of iterations. With knowledge of the physical environment gained in PrimeTime, improved ECO choices can be made and physical-aware ECO guidance will be provided to the place and route tool.
IC Compiler uses enhanced guidance to make more informed placement and routing decisions, and to minimize the physical impact of the ECO, which results in less iterations. Complementing IC Compiler's low power and leakage optimization capabilities, PrimeTime ADV extends leakage recovery to signoff analysis, enabling lower power consumption while preserving signoff timing across multiple mode and process corner scenarios.
"Increasing design functionality, timing and power closure, and rigid tapeout schedules are key challenges for signoff at new process geometries," said Jacob Avidan, VP of engineering for static timing products at Synopsys. "PrimeTime ADV provides a leap forward in designer productivity, enabling the lowest leakage power and highest frequency designs to meet today's aggressive design schedules."
A PrimeTime Special Interest Group (SIG) event will be held on March 26th during SNUG (Synopsys Users Group) Silicon Valley in Santa Clara, Calif., to highlight the new timing features. PrimeTime R&D will present the PrimeTime ADV technologies, and timing experts will share their experiences.
PrimeTime ECO leakage recovery is available now. Physical-aware ECO will be available in the June 2013 PrimeTime release.
Synopsys intros Galaxy Custom Router
USA: Synopsys Inc. has announced advances in its Galaxy Implementation Platform with the introduction of Galaxy Custom Router technology.
The new Galaxy Custom Router provides automatic routing for complex high-speed digital and mixed-signals nets that require carefully crafted, high-quality layouts, such as shielded buses or nets, differential pairs, twisted pairs and matched resistance and capacitance (RC) routing. This new shape-based router delivers 2-5X productivity improvements over manual efforts and is ready for use with advanced designs by offering support for 20-nanometer (nm) and smaller process technology design rules, including double-patterning.
Galaxy Custom Router enables the IC Compiler solution users to create high-quality routing patterns for difficult routing tasks, such as differential pair routing, shielded routing (including bus and differential pair shielding), matched RC routing, river routing and point-to-point coaxial routing. Users can pre-route sensitive nets using a rich set of custom routing options and continue with IC Compiler to complete the physical implementation.
Galaxy Custom Router supports advanced process technology nodes, including 20-nm. For example, it automatically creates colorable routing patterns. It also supports variable track grids—a requirement for some advanced-node processes. Galaxy Custom Router adheres to constraints specified in IC Compiler, including default and non-default design rules, routing grids, route keep-outs, route blockages and route guides.
"Increasingly, mixed-signal and digital designs require hand-crafted-quality routing for sensitive analog and high-speed digital signals," said Paul Lo, senior VP and GM of the Synopsys Analog/Mixed-Signal Group. "Galaxy Custom Router is a key technology for addressing this need, and a significant milestone toward realizing our vision of a unified solution for digital and custom system-on-chip design."
The new Galaxy Custom Router provides automatic routing for complex high-speed digital and mixed-signals nets that require carefully crafted, high-quality layouts, such as shielded buses or nets, differential pairs, twisted pairs and matched resistance and capacitance (RC) routing. This new shape-based router delivers 2-5X productivity improvements over manual efforts and is ready for use with advanced designs by offering support for 20-nanometer (nm) and smaller process technology design rules, including double-patterning.
Galaxy Custom Router enables the IC Compiler solution users to create high-quality routing patterns for difficult routing tasks, such as differential pair routing, shielded routing (including bus and differential pair shielding), matched RC routing, river routing and point-to-point coaxial routing. Users can pre-route sensitive nets using a rich set of custom routing options and continue with IC Compiler to complete the physical implementation.
Galaxy Custom Router supports advanced process technology nodes, including 20-nm. For example, it automatically creates colorable routing patterns. It also supports variable track grids—a requirement for some advanced-node processes. Galaxy Custom Router adheres to constraints specified in IC Compiler, including default and non-default design rules, routing grids, route keep-outs, route blockages and route guides.
"Increasingly, mixed-signal and digital designs require hand-crafted-quality routing for sensitive analog and high-speed digital signals," said Paul Lo, senior VP and GM of the Synopsys Analog/Mixed-Signal Group. "Galaxy Custom Router is a key technology for addressing this need, and a significant milestone toward realizing our vision of a unified solution for digital and custom system-on-chip design."
Mentor Graphics FloEFD helps Bromley develop aerodynamics of Skeleton 2013 sled
USA: Mentor Graphics Corp. announced that its market-leading FloEFD computational fluid dynamics (CFD) simulation solution helped Skeleton Bobsleigh World Championship winner Shelley Rudman of Great Britain to her first world championship win in St. Moritz, Switzerland on February 1, 2013.
Her custom sled was designed and developed by Bromley Technologies Ltd, the leading high-performance Skeleton equipment supplier. They chose the FloEFD CAD-embedded CFD solution because it allows them to parametrically design custom elite athlete-focused sleds inside their chosen MCAD software package, Creo from PTC Inc. The software has helped them achieve improved performance due to usability and functionality.
Rudman said: “This is the title I’ve been waiting for the last two years. Everything just came together on the day, so I'm happy." Prof. Kristan Bromley, CEO of Bromley Technologies, based in Rotherham, UK, and the 2008 World Champion, said: “We have been working with Mentor Graphics on the aerodynamics of the athlete-sled system for the last two years and, when coupled with our structural analysis simulation tools, our in-house design know-how, and many, many hours of testing time on the track, we have come up with a very competitive package for Shelley.”
The Mentor Graphics Concurrent CFD methodology in the FloEFD solution can reduce simulation time by up to 75 percent, compared to traditional CFD tools. It enables users to optimize product performance and reliability while reducing physical prototyping and development costs quickly and cost effectively. The FloEFD solution is an established technology.
“We are addressing real-world manufacturing and engineering challenges with the unique workflow advantages of our FloEFD CFD solution, especially with its advanced performance, usability, and functionality,” said Erich Buergel, GM of the Mentor Graphics Mechanical Analysis Division.
“We are excited for Shelley, Kristan and for Team Bromley, in what they have been able to achieve in such a short period of time, given the competitive constraints they have to work under and a goal of being number one. We wish them ongoing success for the Sochi Olympics next year in Russia.”
Her custom sled was designed and developed by Bromley Technologies Ltd, the leading high-performance Skeleton equipment supplier. They chose the FloEFD CAD-embedded CFD solution because it allows them to parametrically design custom elite athlete-focused sleds inside their chosen MCAD software package, Creo from PTC Inc. The software has helped them achieve improved performance due to usability and functionality.
Rudman said: “This is the title I’ve been waiting for the last two years. Everything just came together on the day, so I'm happy." Prof. Kristan Bromley, CEO of Bromley Technologies, based in Rotherham, UK, and the 2008 World Champion, said: “We have been working with Mentor Graphics on the aerodynamics of the athlete-sled system for the last two years and, when coupled with our structural analysis simulation tools, our in-house design know-how, and many, many hours of testing time on the track, we have come up with a very competitive package for Shelley.”
The Mentor Graphics Concurrent CFD methodology in the FloEFD solution can reduce simulation time by up to 75 percent, compared to traditional CFD tools. It enables users to optimize product performance and reliability while reducing physical prototyping and development costs quickly and cost effectively. The FloEFD solution is an established technology.
“We are addressing real-world manufacturing and engineering challenges with the unique workflow advantages of our FloEFD CFD solution, especially with its advanced performance, usability, and functionality,” said Erich Buergel, GM of the Mentor Graphics Mechanical Analysis Division.
“We are excited for Shelley, Kristan and for Team Bromley, in what they have been able to achieve in such a short period of time, given the competitive constraints they have to work under and a goal of being number one. We wish them ongoing success for the Sochi Olympics next year in Russia.”
Analog Devices’ RMS power detector offers unparalleled frequency performance and flexibility
USA: Analog Devices Inc. (ADI) has introduced a high performance RMS power detector. Featuring operation up to 10 GHz and a 67 dB measurement range, the ADL5906 TruPwr RMS detector is frequency versatile and eliminates the need for external input tuning devices, such as a balun.
The ADL5906 RF detector is well-suited for a variety of applications that require an accurate RMS measurement of signal power including communications infrastructure, power amplifier linearization, Point-to-Point and Point-to-MultiPoint, cable, military, satellite, instrumentation equipment and ISM band transmitters.
Requiring only a single supply of 5V and a few capacitors, the new ADL5906 power detector is easy-to-use and capable of being driven with a single-ended or differential input drive. Furthermore, the ADL5906 provides low temperature drift across a broad -55ºC to +125ºC that is highly repeatable from part-to-part, thereby reducing design risk and manufacturing costs.
The ADL5906 RF detector is well-suited for a variety of applications that require an accurate RMS measurement of signal power including communications infrastructure, power amplifier linearization, Point-to-Point and Point-to-MultiPoint, cable, military, satellite, instrumentation equipment and ISM band transmitters.
Requiring only a single supply of 5V and a few capacitors, the new ADL5906 power detector is easy-to-use and capable of being driven with a single-ended or differential input drive. Furthermore, the ADL5906 provides low temperature drift across a broad -55ºC to +125ºC that is highly repeatable from part-to-part, thereby reducing design risk and manufacturing costs.
Microchip adds smallest and lowest-cost PIC MCU with I2C to portfolio
USA: Microchip Technology Inc. has announced a new addition to its PIC12/16F15XX 8-bit microcontroller (MCU) family.
The low-cost, low pin count PIC12LF1552 is Microchip’s smallest (2x3 mm UDFN package) and lowest-cost PIC MCU with hardware I2C support, and includes a four channel 10-bit Analog-to-Digital Converter (ADC) with hardware Capacitive Voltage Divider (CVD) support for capacitive touch sensing.
Additionally, this new MCU features 3.5 KB Flash program memory, 256 Bytes RAM, a 32 MHz internal oscillator, low-voltage operation from 1.8V to 3.6V, and low power consumption for active and sleep currents of 50 µA/MHz and 20 nA, respectively.
The hardware CVD enables a more efficient implementation of capacitive sensing for touch applications. This “Core-Independent Peripheral” includes additional control logic that enables automated sampling, which reduces software size and minimizes CPU usage. It also provides automatic control of guard-ring drive and a programmable sample-and-hold capacitance, to better match larger touch or proximity sensors.
These capabilities, combined with the low cost and small footprint of the PIC12LF1552, make it well suited for applications such as temperature-monitoring devices, small remote controls (e.g., garage doors and window blinds), smartphone buttons (e.g., input interfaces for Android and Windows 8 phones utilizing hardware CVD), room light control (e.g., switching and dimming, both taking advantage of hardware CVD), and coffeemakers (e.g., input interfaces and water-level monitoring, which both could utilize the hardware CVD and the integrated communication capabilities), among others.
The low-cost, low pin count PIC12LF1552 is Microchip’s smallest (2x3 mm UDFN package) and lowest-cost PIC MCU with hardware I2C support, and includes a four channel 10-bit Analog-to-Digital Converter (ADC) with hardware Capacitive Voltage Divider (CVD) support for capacitive touch sensing.
Additionally, this new MCU features 3.5 KB Flash program memory, 256 Bytes RAM, a 32 MHz internal oscillator, low-voltage operation from 1.8V to 3.6V, and low power consumption for active and sleep currents of 50 µA/MHz and 20 nA, respectively.
The hardware CVD enables a more efficient implementation of capacitive sensing for touch applications. This “Core-Independent Peripheral” includes additional control logic that enables automated sampling, which reduces software size and minimizes CPU usage. It also provides automatic control of guard-ring drive and a programmable sample-and-hold capacitance, to better match larger touch or proximity sensors.
These capabilities, combined with the low cost and small footprint of the PIC12LF1552, make it well suited for applications such as temperature-monitoring devices, small remote controls (e.g., garage doors and window blinds), smartphone buttons (e.g., input interfaces for Android and Windows 8 phones utilizing hardware CVD), room light control (e.g., switching and dimming, both taking advantage of hardware CVD), and coffeemakers (e.g., input interfaces and water-level monitoring, which both could utilize the hardware CVD and the integrated communication capabilities), among others.
Sidense qualifies 1T-OTP NVM for MagnaChip 180nm mixed-signal and HV CMOS process
CANADA, KOREA & USA: MagnaChip Semiconductor Corp., a Korea-based designer and manufacturer of analog and mixed-signal semiconductor products, and Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) one-time programmable (OTP) memory IP cores announced that Sidense's SLP 1T-OTP macros have been fully qualified for MagnaChip's 180nm 1.8/3.3/18V high voltage CMOS and mixed-signal process.
Semiconductor devices fabricated in these processes are used in applications such as LED lighting controllers, display controllers and power-management ICs (PMICs) for mobile and other high-volume applications.
"Leading semiconductor device manufacturers are already using Sidense 1T-OTP macros for LED energy management solutions fabricated using MagnaChip's leading process technology," stated Tom Schild, Sidense's VP of Worldwide Sales and Marketing. "By offering our very dense and low-power SLP memory macros in MagnaChip's HV process, customers have a proven platform in which they can take full advantage of the benefits of 1T-OTP memory and its cost-effectiveness, reliability and security advantages over eFuse, mask ROM and other NVM technologies."
"Qualifying Sidense's SLP 1T-OTP memory macros in our high-voltage and mixed-signal processes with high performance analog devices such as low noise and multi Vt transistors allows us to provide our key customers with significant benefits in performance and die area savings as well as long term reliability at high temperatures," said Namkyu Park, senior VP of Marketing for MagnaChip's Semiconductor Manufacturing Services Division.
"By using MagnaChip's specialized process technology with Sidense's reliable and cost-effective non-volatile memory macros, customers can bring to market products that offer distinct advantages over those of their competitors having flexible analog trimming and/or control program storage."
Semiconductor devices fabricated in these processes are used in applications such as LED lighting controllers, display controllers and power-management ICs (PMICs) for mobile and other high-volume applications.
"Leading semiconductor device manufacturers are already using Sidense 1T-OTP macros for LED energy management solutions fabricated using MagnaChip's leading process technology," stated Tom Schild, Sidense's VP of Worldwide Sales and Marketing. "By offering our very dense and low-power SLP memory macros in MagnaChip's HV process, customers have a proven platform in which they can take full advantage of the benefits of 1T-OTP memory and its cost-effectiveness, reliability and security advantages over eFuse, mask ROM and other NVM technologies."
"Qualifying Sidense's SLP 1T-OTP memory macros in our high-voltage and mixed-signal processes with high performance analog devices such as low noise and multi Vt transistors allows us to provide our key customers with significant benefits in performance and die area savings as well as long term reliability at high temperatures," said Namkyu Park, senior VP of Marketing for MagnaChip's Semiconductor Manufacturing Services Division.
"By using MagnaChip's specialized process technology with Sidense's reliable and cost-effective non-volatile memory macros, customers can bring to market products that offer distinct advantages over those of their competitors having flexible analog trimming and/or control program storage."
Imagination and TSMC strengthen technology collaboration
ENGLAND & TAIWAN: TSMC and Imagination Technologies have announced the next phase of their technology collaboration.
As part of this new phase of their relationship, Imagination will work closely with TSMC to develop highly optimised reference design flows and silicon implementations using Imagination's industry-leading PowerVR Series6 GPUs combined with TSMC's advanced process technologies, including 16-nanometer (nm) FinFET process technology.
Imagination and TSMC R&D teams will also work together to create fully characterised reference system designs, utilizing high bandwidth memory standards and TSMC's 3D IC technology capability to demonstrate new levels of system performance and capabilities while retaining all the essential characteristics of power, silicon area and small package footprint demanded by high volume mobile SoCs.
As GPUs increasingly dominate the area, power and performance of next generation SoCs and the options available to designers using advanced silicon processes become more complex, design flows and libraries need to be optimally tuned to enable design teams to achieve the best possible performance, power consumption and silicon area in ever more demanding timescales.
To address these challenges, Imagination and TSMC are investigating how the characteristics of the latest processes, such as 16FinFET, influence the design of high performance IP-based SoCs.
As part of this new phase of their relationship, Imagination will work closely with TSMC to develop highly optimised reference design flows and silicon implementations using Imagination's industry-leading PowerVR Series6 GPUs combined with TSMC's advanced process technologies, including 16-nanometer (nm) FinFET process technology.
Imagination and TSMC R&D teams will also work together to create fully characterised reference system designs, utilizing high bandwidth memory standards and TSMC's 3D IC technology capability to demonstrate new levels of system performance and capabilities while retaining all the essential characteristics of power, silicon area and small package footprint demanded by high volume mobile SoCs.
As GPUs increasingly dominate the area, power and performance of next generation SoCs and the options available to designers using advanced silicon processes become more complex, design flows and libraries need to be optimally tuned to enable design teams to achieve the best possible performance, power consumption and silicon area in ever more demanding timescales.
To address these challenges, Imagination and TSMC are investigating how the characteristics of the latest processes, such as 16FinFET, influence the design of high performance IP-based SoCs.
Fujitsu Semiconductor releases 1 Mbit and 2 Mbit FRAM products
SINGAPORE: Fujitsu Semiconductor Asia Pte Ltd (FSAL) announced the development of two new FRAM products, MB85RS1MT and MB85RS2MT, which feature 1 Mbit and 2 Mbit of memory,
respectively, making them the largest density serial-interface FRAM products offered by Fujitsu Semiconductor.
The two new FRAM products guarantee 10 trillion read/write cycles, roughly ten times more than existing chips, making them optimal for use in applications such as smart meters, industrial machinery and medical devices. Compared to identical density EEPROM, MB85RS1MT and MB85RS2MT consume 92 percent less power during writing.
In addition, because the new FRAM products can incorporate all the technology required for system memory components—which have typically consisted of EEPROM, SRAM and a battery for data retention—into a single chip, it is possible to substantially reduce component costs, mounted area, and power consumption.
This, in turn, will also greatly contribute to the development of smaller, power-efficient equipment for which maintenance can be easily performed, since backup battery is not necessary.
The new products will be made available in sample quantities starting end of March 2013.
FRAM is a type of memory that features both non-volatility, which allows data to be retained even when the power is switched off, and random access, which enables fast data writing. Because FRAM can safely store data that is being written even during sudden power source failures and power outages, it is possible to ensure the protection of equipment information and data recorded immediately preceding a power source outage.
Based on this capability, since launching volume production in 1999 FRAM products from Fujitsu Semiconductor have been widely employed for use primarily in factory automation equipment, measurement devices, banking terminals, and medical devices.
As an update to its lineup of FRAM products, Fujitsu Semiconductor has recently developed MB85RS1MT (1 Mbit) and MB85RS2MT (2 Mbit), which represent the company’s largest density FRAM products to date to feature an SPI serial interface. Both products feature an improved guaranteed read/write cycle count of 10 trillion cycles, which is ten times more than Fujitsu’s existing FRAM products, providing even better support for real-time, continuous data recording.
For applications including smart meters and other measurement devices, as well as industrial machinery and medical devices such as hearing aids—all of which to date have required 1-2 Mbit non-volatile memory with a serial interface—it is now possible to replace conventional EEPROM with Fujitsu Semiconductor’s new FRAM products.
The resulting improvements in fast writing can lead to greater performance, while also minimizing the risk of data loss from sudden voltage drops or power outages. In terms of power consumed during writing, as well, the new products consume 92 percent less power than EEPROM, thereby helping to extend battery life.
Moreover, for industrial machinery that employs SRAM for data recording and EEPROM for storing parameters and programs, the new FRAM products can incorporate these capabilities into a single chip, allowing for a reduction in the number of memory components required and obviating the need for batteries for data retention.
The memory itself can also be shrunk into a smaller package size, making it possible to reduce the mounted area required for memory components by over 90%. As a result, the new FRAM products help to reduce the size of end products, eliminate the need for battery replacement maintenance, and cut power consumption, in addition to contributing to lower component costs.
Going forward, Fujitsu Semiconductor will continue to deliver solutions that assist customers in improving the performance of end products, in facilitating maintenance on live equipment, and in minimizing risk.
respectively, making them the largest density serial-interface FRAM products offered by Fujitsu Semiconductor.
The two new FRAM products guarantee 10 trillion read/write cycles, roughly ten times more than existing chips, making them optimal for use in applications such as smart meters, industrial machinery and medical devices. Compared to identical density EEPROM, MB85RS1MT and MB85RS2MT consume 92 percent less power during writing.
In addition, because the new FRAM products can incorporate all the technology required for system memory components—which have typically consisted of EEPROM, SRAM and a battery for data retention—into a single chip, it is possible to substantially reduce component costs, mounted area, and power consumption.
This, in turn, will also greatly contribute to the development of smaller, power-efficient equipment for which maintenance can be easily performed, since backup battery is not necessary.
The new products will be made available in sample quantities starting end of March 2013.
FRAM is a type of memory that features both non-volatility, which allows data to be retained even when the power is switched off, and random access, which enables fast data writing. Because FRAM can safely store data that is being written even during sudden power source failures and power outages, it is possible to ensure the protection of equipment information and data recorded immediately preceding a power source outage.
Based on this capability, since launching volume production in 1999 FRAM products from Fujitsu Semiconductor have been widely employed for use primarily in factory automation equipment, measurement devices, banking terminals, and medical devices.
As an update to its lineup of FRAM products, Fujitsu Semiconductor has recently developed MB85RS1MT (1 Mbit) and MB85RS2MT (2 Mbit), which represent the company’s largest density FRAM products to date to feature an SPI serial interface. Both products feature an improved guaranteed read/write cycle count of 10 trillion cycles, which is ten times more than Fujitsu’s existing FRAM products, providing even better support for real-time, continuous data recording.
For applications including smart meters and other measurement devices, as well as industrial machinery and medical devices such as hearing aids—all of which to date have required 1-2 Mbit non-volatile memory with a serial interface—it is now possible to replace conventional EEPROM with Fujitsu Semiconductor’s new FRAM products.
The resulting improvements in fast writing can lead to greater performance, while also minimizing the risk of data loss from sudden voltage drops or power outages. In terms of power consumed during writing, as well, the new products consume 92 percent less power than EEPROM, thereby helping to extend battery life.
Moreover, for industrial machinery that employs SRAM for data recording and EEPROM for storing parameters and programs, the new FRAM products can incorporate these capabilities into a single chip, allowing for a reduction in the number of memory components required and obviating the need for batteries for data retention.
The memory itself can also be shrunk into a smaller package size, making it possible to reduce the mounted area required for memory components by over 90%. As a result, the new FRAM products help to reduce the size of end products, eliminate the need for battery replacement maintenance, and cut power consumption, in addition to contributing to lower component costs.
Going forward, Fujitsu Semiconductor will continue to deliver solutions that assist customers in improving the performance of end products, in facilitating maintenance on live equipment, and in minimizing risk.
Friday, March 22, 2013
North American semiconductor equipment industry posts February 2013 book-to-bill ratio of 1.10
USA: North America-based manufacturers of semiconductor equipment posted $1.07 billion in orders worldwide in February 2013 (three-month average basis) and a book-to-bill ratio of 1.10, according to the February Book-to-Bill Report published by SEMI. A book-to-bill of 1.10 means that $110 worth of orders were received for every $100 of product billed for the month.
The three-month average of worldwide bookings in February 2013 was $1.07 billion. The bookings figure is 0.2 percent lower than the final January 2013 level of $1.08 billion, and is 19.7 percent lower than the February 2012 order level of $1.34 billion.
The three-month average of worldwide billings in February 2013 was $975.3 million. The billings figure is 0.8 percent higher than the final January 2013 level of $968.0 million, and is 26.3 percent lower than the February 2012 billings level of $1.32 billion.
“Three-month average bookings and billings posted by North American semiconductor equipment providers remain above parity and consistent with prior month levels," said Denny McGuirk, president and CEO of SEMI. "We expect modest investment by semiconductor makers in the first half of the year with foundry and advanced packaging technology among the near-term spending drivers.”
The three-month average of worldwide bookings in February 2013 was $1.07 billion. The bookings figure is 0.2 percent lower than the final January 2013 level of $1.08 billion, and is 19.7 percent lower than the February 2012 order level of $1.34 billion.
The three-month average of worldwide billings in February 2013 was $975.3 million. The billings figure is 0.8 percent higher than the final January 2013 level of $968.0 million, and is 26.3 percent lower than the February 2012 billings level of $1.32 billion.
“Three-month average bookings and billings posted by North American semiconductor equipment providers remain above parity and consistent with prior month levels," said Denny McGuirk, president and CEO of SEMI. "We expect modest investment by semiconductor makers in the first half of the year with foundry and advanced packaging technology among the near-term spending drivers.”
Toshiba develops low power OS for many-core LSI for embedded apps
Design Automation & Test in Europe 2013, JAPAN: Toshiba Corp. has developed an innovative, low power operating system (OS) for many-core processors, targeting application in embedded systems, including automotive products and digital consumer products.
An evaluation of the OS on the company's own many-core processor recorded a 24.6 percent power reduction against the standard OS when running a super resolution program that scaled 1920x1080 pixel images to 3840x2160 resolutions. Details of the new OS were presented at "Design, Automation & Test in Europe (DATE 2013)" in Grenoble, France on March 20.
Recent multimedia processing, including video encoding and decoding and image recognition, requires high performance processors. Many-core processors, with up to dozens of cores, are finding an important role in running these applications. However, there is a problem: the higher the number of cores, the higher total power consumption. Manufactures want low power systems in order to maximize the battery life of mobile devices, and in consideration of the environment.
In current methodology, the OS controls power to the processor based on computation load history. However, this approach is not accurate enough to reduce power consumption and fails to manage abrupt fluctuations in computation load, and so more power than necessary is consumed.
Toshiba's many-core processor OS achieves low power consumption by using information inherent to parallel programs to control power supply. Parallel programs are run by a thread unit, and to run correctly the order for executing the threads must be specified.
Toshiba has developed and employed a technique for specifying the "number of dependence" among threads and controlling the execution order. This approach recognizes that the dependency number at any given time closely foreshadows the computation load in the near future, securing a more accurate prediction of power requirements. The new OS controls power supply and achieves a low power system without degradation in performance.
Toshiba plans to apply the low power OS to embedded systems for such applications as high resolution image processing and image recognition.
An evaluation of the OS on the company's own many-core processor recorded a 24.6 percent power reduction against the standard OS when running a super resolution program that scaled 1920x1080 pixel images to 3840x2160 resolutions. Details of the new OS were presented at "Design, Automation & Test in Europe (DATE 2013)" in Grenoble, France on March 20.
Recent multimedia processing, including video encoding and decoding and image recognition, requires high performance processors. Many-core processors, with up to dozens of cores, are finding an important role in running these applications. However, there is a problem: the higher the number of cores, the higher total power consumption. Manufactures want low power systems in order to maximize the battery life of mobile devices, and in consideration of the environment.
In current methodology, the OS controls power to the processor based on computation load history. However, this approach is not accurate enough to reduce power consumption and fails to manage abrupt fluctuations in computation load, and so more power than necessary is consumed.
Toshiba's many-core processor OS achieves low power consumption by using information inherent to parallel programs to control power supply. Parallel programs are run by a thread unit, and to run correctly the order for executing the threads must be specified.
Toshiba has developed and employed a technique for specifying the "number of dependence" among threads and controlling the execution order. This approach recognizes that the dependency number at any given time closely foreshadows the computation load in the near future, securing a more accurate prediction of power requirements. The new OS controls power supply and achieves a low power system without degradation in performance.
Toshiba plans to apply the low power OS to embedded systems for such applications as high resolution image processing and image recognition.
Lattice announces world's smallest FPGA for miniature systems
USA: Lattice Semiconductor Corp. announced the iCE40 LP384 FPGA, the smallest member of its expanding iCE40 family of ultra-low density FPGAs.
Enabling designers to rapidly add new features and differentiate cost-sensitive, space-constrained, low-power products, the new small footprint FPGA is ideal for applications such as portable medical monitors, smartphones, digital cameras, eReaders, and compact embedded systems.
The tiny, low power, low cost iCE40 LP384 FPGA has a capacity of 384 LUTs; consumes 25-Microwatts static core power; comes in packages as small as 2.5 mm x 2.5 mm with a migration path to 2.0 mm x 2.0 mm and costs less than 50 cents per unit in multi-million unit quantities.
"While system footprints continue to shrink, designers must constantly search for new ways to add more functionality so they can process more information," said Brent Przybus, senior director of corporate and product marketing at Lattice Semiconductor.
"The iCE40 LP384 FPGA offers the perfect architecture for capturing and processing large amounts of data at hardware speeds while using very little power and board space. It deftly handles system tasks such as managing sensor interfaces, adapting to new interface standards, and offloading the CPU without requiring fully custom-designed chips."
The exponential growth of handheld applications is creating new challenges for hardware designers. Many new applications today connect end users with data collected from a growing number of sensors that measure natural phenomena such as temperature, moisture, light, and positioning. At the same time, the growing use of video is driving the deployment of new low power, display technology that not only enhances the visual experience, but does so without breaking stringent power budgets.
Moreover, small automated control units are now being used to maximize energy efficiency and security in buildings and homes by responding to light, infrared, noise, and by adjusting fans, blinds, and temperature controls. Designers of these types of equipment must find ways to shrink the size of their systems while differentiating their products from competitive market offerings.
Enabling designers to rapidly add new features and differentiate cost-sensitive, space-constrained, low-power products, the new small footprint FPGA is ideal for applications such as portable medical monitors, smartphones, digital cameras, eReaders, and compact embedded systems.
The tiny, low power, low cost iCE40 LP384 FPGA has a capacity of 384 LUTs; consumes 25-Microwatts static core power; comes in packages as small as 2.5 mm x 2.5 mm with a migration path to 2.0 mm x 2.0 mm and costs less than 50 cents per unit in multi-million unit quantities.
"While system footprints continue to shrink, designers must constantly search for new ways to add more functionality so they can process more information," said Brent Przybus, senior director of corporate and product marketing at Lattice Semiconductor.
"The iCE40 LP384 FPGA offers the perfect architecture for capturing and processing large amounts of data at hardware speeds while using very little power and board space. It deftly handles system tasks such as managing sensor interfaces, adapting to new interface standards, and offloading the CPU without requiring fully custom-designed chips."
The exponential growth of handheld applications is creating new challenges for hardware designers. Many new applications today connect end users with data collected from a growing number of sensors that measure natural phenomena such as temperature, moisture, light, and positioning. At the same time, the growing use of video is driving the deployment of new low power, display technology that not only enhances the visual experience, but does so without breaking stringent power budgets.
Moreover, small automated control units are now being used to maximize energy efficiency and security in buildings and homes by responding to light, infrared, noise, and by adjusting fans, blinds, and temperature controls. Designers of these types of equipment must find ways to shrink the size of their systems while differentiating their products from competitive market offerings.
NXP launches industry’s first automotive-grade isolated CAN transceiver
SINGAPORE: Building on its industry-leading position in In-Vehicle Networking, NXP Semiconductors N.V. introduced the TJA1052i, a high-speed Controller Area Network (CAN) transceiver with integrated galvanic isolation technology.
The TJA1052i is the first ISO11898-2 compliant product of its kind to offer this level of integration at AEC-Q100 automotive grade quality.
The TJA1052i is an excellent choice for all types of CAN networks where high- and low-voltage networks co-exist – such as in electric and hybrid vehicles – and require galvanic isolation for safety reasons.
Adding isolation to the CAN transceiver significantly simplifies the design effort to safely bridge between high and low voltage levels. The TJA1052i provides protection against electric shocks, overvoltage, ground offset and reverse current, while significantly improving signal integrity in noisy electromagnetic environments.
By integrating an existing market accepted CAN transceiver with a Galvanic Isolator in one package, this new solution ensures matching dynamic parameters, reduces board space, improves signal performance, and increases overall reliability and cost-effectiveness.
Historically, automotive OEMs and Tier 1 suppliers have used expensive Opto Couplers to isolate the CAN transceiver, with performance in such a standalone solution tending to degrade over time.
The TJA1052i is well-suited for the growing market of hybrid and full electric vehicles (H/EVs), where high and low voltage levels co-exist. H/EVs are equipped with multiple battery modules – typically controlled via CAN by the Battery Management System – which together can supply up to 500 Volts and also power other high-voltage applications such as inverter, start/stop, DC/DC converter, charger and air conditioning systems.
These systems need to communicate with other electronic control units (ECUs) via the CAN Bus, and are typically operated from the 12V board net.
Isolated CAN products are also needed in industrial applications where ECUs controlling high voltage applications and other ECUs need to be connected to each other via the CAN bus. Application examples for the TJA1052i in non-automotive areas are industrial equipment, energy storage systems, building automation and H/EV charging stations.
“The TJA1052i is another great example of NXP’s strategy to both connect the car and improve energy efficiency – even under challenging conditions,” said Toni Versluijs, VP and GM, in-vehicle networking business, NXP Semiconductors.
“Our third-generation automotive CAN transceivers are already approved and used by multiple OEMs. By integrating galvanic isolation into the TJA1052i, we are first in the industry to deliver an automotive-grade solution that saves both space and money, while making it easier for our customers to build and connect their ECUs.”
The TJA1052i is ramping up in production with immediate effect.
The TJA1052i is the first ISO11898-2 compliant product of its kind to offer this level of integration at AEC-Q100 automotive grade quality.
The TJA1052i is an excellent choice for all types of CAN networks where high- and low-voltage networks co-exist – such as in electric and hybrid vehicles – and require galvanic isolation for safety reasons.
Adding isolation to the CAN transceiver significantly simplifies the design effort to safely bridge between high and low voltage levels. The TJA1052i provides protection against electric shocks, overvoltage, ground offset and reverse current, while significantly improving signal integrity in noisy electromagnetic environments.
By integrating an existing market accepted CAN transceiver with a Galvanic Isolator in one package, this new solution ensures matching dynamic parameters, reduces board space, improves signal performance, and increases overall reliability and cost-effectiveness.
Historically, automotive OEMs and Tier 1 suppliers have used expensive Opto Couplers to isolate the CAN transceiver, with performance in such a standalone solution tending to degrade over time.
The TJA1052i is well-suited for the growing market of hybrid and full electric vehicles (H/EVs), where high and low voltage levels co-exist. H/EVs are equipped with multiple battery modules – typically controlled via CAN by the Battery Management System – which together can supply up to 500 Volts and also power other high-voltage applications such as inverter, start/stop, DC/DC converter, charger and air conditioning systems.
These systems need to communicate with other electronic control units (ECUs) via the CAN Bus, and are typically operated from the 12V board net.
Isolated CAN products are also needed in industrial applications where ECUs controlling high voltage applications and other ECUs need to be connected to each other via the CAN bus. Application examples for the TJA1052i in non-automotive areas are industrial equipment, energy storage systems, building automation and H/EV charging stations.
“The TJA1052i is another great example of NXP’s strategy to both connect the car and improve energy efficiency – even under challenging conditions,” said Toni Versluijs, VP and GM, in-vehicle networking business, NXP Semiconductors.
“Our third-generation automotive CAN transceivers are already approved and used by multiple OEMs. By integrating galvanic isolation into the TJA1052i, we are first in the industry to deliver an automotive-grade solution that saves both space and money, while making it easier for our customers to build and connect their ECUs.”
The TJA1052i is ramping up in production with immediate effect.
Geniatech selects Entropic's silicon to power new generation of USB bus-powered MoCA adapters
CHINA: Entropic announced that its Multimedia over Coax Alliance (MoCA) silicon and software was selected by Geniatech, a leading OEM/ODM to develop a USB bus-powered MoCA adapter solution for TVs and consumer electronics (CE) devices.
MoCA is already the de-facto home networking technology used by North American Pay-TV operators. Entropic is expanding MoCA's use into European, Latin American and Asian CE markets by driving innovation with a focus on delivering a superior user experience on any networked TV platform.
Geniatech's new USB bus-powered MoCA-to-Ethernet Adapter easily connects service provider or CE devices to the MoCA backbone providing Ethernet-grade connectivity without the need for a separate
power supply or to the need to pull new CAT-5 (category 5) wiring throughout the home.
As the only semiconductor company that has developed a USB bus-powered MoCA adapter reference design, Entropic is enabling OEMs/ODMs to bring innovative MoCA-based USB solutions to market. The small form factor and low power makes possible an out-of-sight, simple installation and enables MoCA home networking to be added to any Ethernet-ready CE device or set-top-box (STB) already deployed in a consumer's home.
After installation, the MoCA backbone can be used to deliver smooth HD video from over-the-top (OTT) services, enable multi-room DVR (MR-DVR) solutions or simply distribute broadband service to other parts of the home.
MoCA is already the de-facto home networking technology used by North American Pay-TV operators. Entropic is expanding MoCA's use into European, Latin American and Asian CE markets by driving innovation with a focus on delivering a superior user experience on any networked TV platform.
Geniatech's new USB bus-powered MoCA-to-Ethernet Adapter easily connects service provider or CE devices to the MoCA backbone providing Ethernet-grade connectivity without the need for a separate
power supply or to the need to pull new CAT-5 (category 5) wiring throughout the home.
As the only semiconductor company that has developed a USB bus-powered MoCA adapter reference design, Entropic is enabling OEMs/ODMs to bring innovative MoCA-based USB solutions to market. The small form factor and low power makes possible an out-of-sight, simple installation and enables MoCA home networking to be added to any Ethernet-ready CE device or set-top-box (STB) already deployed in a consumer's home.
After installation, the MoCA backbone can be used to deliver smooth HD video from over-the-top (OTT) services, enable multi-room DVR (MR-DVR) solutions or simply distribute broadband service to other parts of the home.
Thursday, March 21, 2013
DELTA Microelectronics to expand global activities with ChipStart
DENMARK, CANADA & USA: ChipStart LLC, a leading provider of semiconductor intellectual property (SIP), and DELTA Microelectronics, a leader in ASIC services for the semiconductor industry, are partnering to bring the power of innovation to the market through a joint relationship.
The relationship will involve the sale, marketing and global representation of DELTA’s design services, including its production and test capabilities through ChipStart’s extensive sales channel.
“We are extremely pleased to be in a position to take advantage of DELTA’s intimate knowledge of the mobile payment, RFID and sensor markets and to be able to offer their extensive portfolio of solutions,” said Howard Pakosh, president and CEO, ChipStart. “By officially recognizing this partnership, we are continuing to grow our capabilities and services giving our customers the tools necessary to develop next generation technologies.”
“DELTA Microelectronics is happy to team with ChipStart. Their portfolio is complementary to DELTA’s, so we expect that our customers can gain significant synergies from this cooperation,” comments DELTA’s VP of Sales and Marketing, Gert Jørgensen.
ChipStart will promote DELTA Microelectronics’ ASIC Design Services to system houses and semiconductor communities throughout North America, with the specific focus on chips used in the areas of mobile payment systems, RFID, optical systems and sensor systems.
The relationship will involve the sale, marketing and global representation of DELTA’s design services, including its production and test capabilities through ChipStart’s extensive sales channel.
“We are extremely pleased to be in a position to take advantage of DELTA’s intimate knowledge of the mobile payment, RFID and sensor markets and to be able to offer their extensive portfolio of solutions,” said Howard Pakosh, president and CEO, ChipStart. “By officially recognizing this partnership, we are continuing to grow our capabilities and services giving our customers the tools necessary to develop next generation technologies.”
“DELTA Microelectronics is happy to team with ChipStart. Their portfolio is complementary to DELTA’s, so we expect that our customers can gain significant synergies from this cooperation,” comments DELTA’s VP of Sales and Marketing, Gert Jørgensen.
ChipStart will promote DELTA Microelectronics’ ASIC Design Services to system houses and semiconductor communities throughout North America, with the specific focus on chips used in the areas of mobile payment systems, RFID, optical systems and sensor systems.
ARM and Synopsys to deliver optimized reference implementations for ARM processors
USA & ENGLAND: ARM and Synopsys announced the availability of optimized 28-nanometer (nm) Synopsys Reference Implementations for ARM Cortex-A15 MPCore and Cortex-A7 MPCore processor clusters as well as the CoreLink CCI-400 cache-coherent interconnect.
The companies collaborated to deliver these optimized implementations in TSMC 28HPM process technology using the Synopsys Galaxy Implementation Platform, ARM Artisan standard cells and memories, and ARM POP technology for core-hardening acceleration specifically optimized for Cortex-A15 and Cortex-A7 processor implementations.
System-on-a-chip (SoC) designers can use these Reference Implementations to create high-performance Cortex-A15 and energy-efficient Cortex-A7 processor clusters, and can combine them with the CCI-400 interconnect to create a big.LITTLE processing system that delivers increased product functionality with longer battery life.
"With a diverse range of products expected in today's end markets, ARM Powered solutions need to be optimized across a spectrum of energy-efficiency and high-performance targets," said Tom Cronk, executive VP and GM, Processor Division at ARM.
"The companies' collaboration has resulted in the Synopsys Reference Implementations for Cortex-A15 and Cortex-A7 processors. They will enable our customers to more quickly converge on their aggressive design goals, and take advantage of the benefits of big.LITTLE processing and POP IP to address the demands of their target markets."
Configured for ARM Cortex-A15 and Cortex-A7 processors as well as CCI-400 interconnect, the Synopsys Reference Implementations provide tool scripts, a baseline floorplan, design constraints and documentation to serve as an optimized starting point for implementation.
These scripts, built on the widely-used Synopsys tool Reference Methodologies (RMs) and optimized for high-performance cores, leverage Galaxy Platform capabilities such as Design Compiler Graphical physical guidance for improved timing and post-route correlation.
The scripts also leverage IC Compiler technologies, including final-stage leakage recovery for reduced leakage power, data flow analysis for faster floorplan creation and transparent interface optimization for faster top-level closure. They are configured for TSMC 28HPM process technology with ARM Artisan standard cells, memories and ARM POP technology. Designers may further optimize the scripts for their own design goals, processor configurations, process technologies and libraries.
Reference Implementation technology plug-ins for the Synopsys Lynx Design System will enable a full, chip-level production design flow. Synopsys also provides expert professional services to help designers deploy and customize the Reference Implementations to achieve their specific SoC design goals.
The Synopsys Reference Implementation for the Cortex-A7 processor cluster is for a quad-core MPCore configuration, optimized first for energy efficiency, then for maximum speed to provide energy-efficient multi-processing. For high-performance multi-processing within a tight power envelope, the Reference Implementation for the Cortex-A15 processor cluster targets a dual-core configuration, optimized first for performance, then for power.
The CCI-400 interconnect implementation is optimized for the combination of these two processor clusters into a big.LITTLE processing system.
ARM and Synopsys have also collaborated on a reference verification platform for Synopsys Discovery Verification IP, which supports the ARM AMBA 4 ACE protocol and CCI-400 interconnect. With this reference verification platform, verification engineers can rapidly develop highly efficient verification environments for their cache-coherent designs.
"This latest collaboration with ARM continues our long-standing tradition of creating solutions to address our mutual customers' key design challenges," said Antun Domic, senior VP and GM, Implementation Group at Synopsys.
"The Synopsys Reference Implementations for ARM Cortex-A15 and Cortex-A7 processors as well as CCI-400 interconnect take advantage of ARM and Synopsys technologies as well as our high-performance and low-power design expertise to enable designers to achieve optimized SoC performance and power targets on an accelerated timeline."
The 28nm Reference Implementation scripts and documentation for dual-core Cortex-A15 MPCore, quad-core Cortex-A7 and CCI-400 interconnect are available today for Synopsys customers under maintenance who are ARMv7 processor licensees:
Lynx technology plug-ins for these Reference Implementations are planned to be available at the end of April, 2013. The Synopsys Verification IP and Reference Platform for AMBA 4 ACE protocol and CCI-400 interconnect are available today from Synopsys.
The companies collaborated to deliver these optimized implementations in TSMC 28HPM process technology using the Synopsys Galaxy Implementation Platform, ARM Artisan standard cells and memories, and ARM POP technology for core-hardening acceleration specifically optimized for Cortex-A15 and Cortex-A7 processor implementations.
System-on-a-chip (SoC) designers can use these Reference Implementations to create high-performance Cortex-A15 and energy-efficient Cortex-A7 processor clusters, and can combine them with the CCI-400 interconnect to create a big.LITTLE processing system that delivers increased product functionality with longer battery life.
"With a diverse range of products expected in today's end markets, ARM Powered solutions need to be optimized across a spectrum of energy-efficiency and high-performance targets," said Tom Cronk, executive VP and GM, Processor Division at ARM.
"The companies' collaboration has resulted in the Synopsys Reference Implementations for Cortex-A15 and Cortex-A7 processors. They will enable our customers to more quickly converge on their aggressive design goals, and take advantage of the benefits of big.LITTLE processing and POP IP to address the demands of their target markets."
Configured for ARM Cortex-A15 and Cortex-A7 processors as well as CCI-400 interconnect, the Synopsys Reference Implementations provide tool scripts, a baseline floorplan, design constraints and documentation to serve as an optimized starting point for implementation.
These scripts, built on the widely-used Synopsys tool Reference Methodologies (RMs) and optimized for high-performance cores, leverage Galaxy Platform capabilities such as Design Compiler Graphical physical guidance for improved timing and post-route correlation.
The scripts also leverage IC Compiler technologies, including final-stage leakage recovery for reduced leakage power, data flow analysis for faster floorplan creation and transparent interface optimization for faster top-level closure. They are configured for TSMC 28HPM process technology with ARM Artisan standard cells, memories and ARM POP technology. Designers may further optimize the scripts for their own design goals, processor configurations, process technologies and libraries.
Reference Implementation technology plug-ins for the Synopsys Lynx Design System will enable a full, chip-level production design flow. Synopsys also provides expert professional services to help designers deploy and customize the Reference Implementations to achieve their specific SoC design goals.
The Synopsys Reference Implementation for the Cortex-A7 processor cluster is for a quad-core MPCore configuration, optimized first for energy efficiency, then for maximum speed to provide energy-efficient multi-processing. For high-performance multi-processing within a tight power envelope, the Reference Implementation for the Cortex-A15 processor cluster targets a dual-core configuration, optimized first for performance, then for power.
The CCI-400 interconnect implementation is optimized for the combination of these two processor clusters into a big.LITTLE processing system.
ARM and Synopsys have also collaborated on a reference verification platform for Synopsys Discovery Verification IP, which supports the ARM AMBA 4 ACE protocol and CCI-400 interconnect. With this reference verification platform, verification engineers can rapidly develop highly efficient verification environments for their cache-coherent designs.
"This latest collaboration with ARM continues our long-standing tradition of creating solutions to address our mutual customers' key design challenges," said Antun Domic, senior VP and GM, Implementation Group at Synopsys.
"The Synopsys Reference Implementations for ARM Cortex-A15 and Cortex-A7 processors as well as CCI-400 interconnect take advantage of ARM and Synopsys technologies as well as our high-performance and low-power design expertise to enable designers to achieve optimized SoC performance and power targets on an accelerated timeline."
The 28nm Reference Implementation scripts and documentation for dual-core Cortex-A15 MPCore, quad-core Cortex-A7 and CCI-400 interconnect are available today for Synopsys customers under maintenance who are ARMv7 processor licensees:
Lynx technology plug-ins for these Reference Implementations are planned to be available at the end of April, 2013. The Synopsys Verification IP and Reference Platform for AMBA 4 ACE protocol and CCI-400 interconnect are available today from Synopsys.
Ittiam announces media cloud foray
INDIA: Ittiam Systems, a leader in video technologies and multimedia systems, announced its foray into cloud media processing, in connecting the content creator and the consumer via the ubiquitous Internet.
With content becoming the primary focus of emerging workflows, Ittiam is pleased to announce a focused investment to address that market. The company’s new division, Ittiam Media Labs, will develop and deliver end-to-end workflows that enable Media Enterprises to leverage the power of the Cloud on top of the video processing expertise that Ittiam is renowned for, over the years.
Ittiam Media Labs will focus on Quality of Experience, with technology differentiation coming out of HEVC (High Efficiency Video Coding also known as H.265) processing, among the first companies to offer that technology on the Cloud. It will cater to a genre of customers:
a) niche content owner looking to monetize the content better,
b) enterprise looking to leverage the power of the Cloud to trade-off between capital and operating investments,
c) Online Video services provider focused on seamless consumer experiences and d) Telco looking to improve efficiencies in the network to provide a tangible value that comes out of a compelling workflow.
“Media in the Cloud is a natural next step for Ittiam, where we have always been focused on disruptive innovations in the media processing technologies,” said Srini Rajam, chairman and CEO of Ittiam Systems.
“We expect online video solution providers to place a premium on the efficiency of multi-format distributions, a cornerstone of online delivery to multiple screens of Internet-connected, smart devices. This is backed by the strong interest we are seeing from online video platforms and content consumption platforms looking to differentiate and move up the value chain.“
With content becoming the primary focus of emerging workflows, Ittiam is pleased to announce a focused investment to address that market. The company’s new division, Ittiam Media Labs, will develop and deliver end-to-end workflows that enable Media Enterprises to leverage the power of the Cloud on top of the video processing expertise that Ittiam is renowned for, over the years.
Ittiam Media Labs will focus on Quality of Experience, with technology differentiation coming out of HEVC (High Efficiency Video Coding also known as H.265) processing, among the first companies to offer that technology on the Cloud. It will cater to a genre of customers:
a) niche content owner looking to monetize the content better,
b) enterprise looking to leverage the power of the Cloud to trade-off between capital and operating investments,
c) Online Video services provider focused on seamless consumer experiences and d) Telco looking to improve efficiencies in the network to provide a tangible value that comes out of a compelling workflow.
“Media in the Cloud is a natural next step for Ittiam, where we have always been focused on disruptive innovations in the media processing technologies,” said Srini Rajam, chairman and CEO of Ittiam Systems.
“We expect online video solution providers to place a premium on the efficiency of multi-format distributions, a cornerstone of online delivery to multiple screens of Internet-connected, smart devices. This is backed by the strong interest we are seeing from online video platforms and content consumption platforms looking to differentiate and move up the value chain.“
Fujitsu releases 1 Mbit and 2 Mbit FRAM products
USA: Fujitsu Semiconductor America announced two new FRAM products featuring 1 Mbit and 2 Mbits of memory. The MB85RS1MT and MB85RS2MT, the largest-capacity, serial-interface FRAM products offered by Fujitsu, will be available in sample quantities at the end of March.
The MB85RS1MT and MB85RS2MT FRAMs offer features that are ideal for smart meters, industrial machinery and medical devices, including high endurance, higher writing speed, larger density and low power consumption.
The new FRAMs can support 10 trillion writing cycles, an endurance roughly 10 times greater than previous ferroelectric memories from Fujitsu and superior to other nonvolatile memories by at least a million times. Memory devices using FRAM consume 92 percent less power during writing compared to identical-capacity EEPROMs, and feature a writing speed 920 times faster.
As a single-chip solution, the new FRAM products substantially reduce component costs, mounted area, and power consumption compared to other system memory solutions that use EEPROM or SRAM and a battery for data retention. The new FRAM devices, by eliminating the need for a battery and additional memory components, simplify the design process, save board space, and reduce maintenance costs.
FRAM is a high-speed random access memory that is non-volatile, allowing data to be retained when the power is switched off. Its speed and durability enable FRAM to safely store more data than alternative solutions in the event of a sudden power failure.
The dependability of FRAM for data retention has made it the choice of global customers for factory automation equipment, measurement devices, banking terminals, and medical devices since its introduction by Fujitsu in 1999.
The MB85RS1MT and MB85RS2MT FRAMs offer features that are ideal for smart meters, industrial machinery and medical devices, including high endurance, higher writing speed, larger density and low power consumption.
The new FRAMs can support 10 trillion writing cycles, an endurance roughly 10 times greater than previous ferroelectric memories from Fujitsu and superior to other nonvolatile memories by at least a million times. Memory devices using FRAM consume 92 percent less power during writing compared to identical-capacity EEPROMs, and feature a writing speed 920 times faster.
As a single-chip solution, the new FRAM products substantially reduce component costs, mounted area, and power consumption compared to other system memory solutions that use EEPROM or SRAM and a battery for data retention. The new FRAM devices, by eliminating the need for a battery and additional memory components, simplify the design process, save board space, and reduce maintenance costs.
FRAM is a high-speed random access memory that is non-volatile, allowing data to be retained when the power is switched off. Its speed and durability enable FRAM to safely store more data than alternative solutions in the event of a sudden power failure.
The dependability of FRAM for data retention has made it the choice of global customers for factory automation equipment, measurement devices, banking terminals, and medical devices since its introduction by Fujitsu in 1999.
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