SAN FRANCISCO, USA & OSAKA, JAPAN: Helic Inc., the technology leader in EDA solutions for RF and high-speed IC design and SHARP Corp., proudly announced that SHARP selected Helic's VeloceRF, VeloceRaptor/X and VeloceWired to be part of its RFIC design flow.
To meet the demands of RF and high-speed design in advanced silicon processes, VeloceRF features a unique component-synthesis engine that generates DRC and DFM-correct inductive devices according to designer specifications. VeloceRF brings a complete solution for achieving an optimal floor plan, enabling silicon area reduction by optimizing inductor sizes. The tool de-risks the design from electromagnetic effects, incorporating EM coupling parasitics in post-layout simulation.
VeloceRaptor/X is a breakthrough RLCK modeling tool with unparalleled capacity and speed suitable for integrated passives such as transmission lines, interconnects, digital high-speed lines, spiral inductive devices and MIM/MOM capacitors. VeloceWired completes the flow with the design and extraction of 3D structures like bondwires providing instantly the impact of package parasitics on RFIC performance.
Dr. Kunihiko Iizuka, Design Manager at Electronic Components and Devices Group at SHARP, commented on how Helic's EDA products were instrumental for the successful development of a silicon Low Noise Block-down converter (LNB) designed in a challenging CMOS process. "VeloceRF and VeloceRaptor/X(TM) helped us to optimize our floor plan and design with high speed and accuracy, while with VeloceWired(R) we managed to design an optimum input-matching network for our LNA block. The results lead to successful mass production of a silicon LNB with the first parts shipping to customers in April 2011."
"SHARP leverages their leadership in RF devices to foray the satellite market and we are very proud to contribute with our tools in this endeavor setting higher standards to address their design needs", said Yorgos Koutsoyannopoulos, CEO of Helic.