NetLogic announces production orders into LTE base stations for ground-breaking XLP multi-core processors

SANTA CLARA, USA: NetLogic Microsystems Inc. has received, and is now accepting orders for volume production for its best-in-class XLP316L multi-core, multi-threaded processors from customers developing next-generation LTE base stations. NetLogic Microsystems’ industry-leading XLP316L multi-core processor delivers unparalleled performance and sets a new standard for Tier One OEMs developing highly differentiated eNodeB solutions for LTE and LTE-Advanced.

The XLP316L multi-core processor integrates 16 high-performance NXCPUs and an innovative quad-issue, quad-threaded processor architecture with superscalar out-of-order execution capabilities to deliver the industry’s highest performance Layers 2-7 processing for mobile wireless infrastructure. In addition, the XLP316L processor offers a number of base station-specific features that make it ideally suited to LTE applications, such as an advanced floating point unit (FPU), Kasumi and SNOW3G security protocol acceleration and a low-latency Serial RapidIO (SRIO) interface.

“The receipt of orders for volume production from our leading customers for the XLP316L processor, just months after its announcement, is a testament to the compelling benefits of the product and to its success in addressing the critical requirements of advanced LTE networks,” said Chris O’Reilly, vice president of marketing for NetLogic Microsystems.

“Through outstanding execution, we have accelerated the delivery of this product to the market at a time when the deployment of LTE infrastructure is gaining momentum worldwide. With highly differentiated performance and feature sets, our XLP processor product family is having tremendous design win success throughout wireless infrastructure, including common platform base stations, service gateways and equipment targeted at the mobile packet core. Its state-of-the-art design is enabling our Tier One customers to keep pace with the increasingly rigorous demands of advanced wireless telecommunications.”

The industry migration from 3G WCDMA and HSPA+ mobile wireless technologies to 4G LTE and LTE-Advanced protocols requires at least a 10X increase in the performance of next-generation base stations to enable significantly greater bandwidth and faster download speeds.

The XLP316L multi-core processor is perfectly suited for this application, offering unparalleled performance of up to 20 Gigabits-per-second (Gbps) and 30 million packets-per-second (Mpps) for converged data plane and control plane processing, all within a low power profile, enabled in part by its development on the advanced 40 nanometer process technology. In addition, its NXCPUs are fully cache and memory coherent for software applications to seamlessly run in Symmetric Multi Processing (SMP) or Asymmetric Multi Processing (AMP) modes.

The XLP316L multi-core, multi-threaded processor features NetLogic Microsystems' high-speed, low-latency Enhanced Fast Messaging Network to enable efficient, high-bandwidth communication among the 16 NXCPUs and to support billions of in-flight messages and packet descriptors between all on-chip elements. The XLP316L processor also offers a unique tri-level cache architecture with more than 6 Megabytes of fully coherent on-chip cache, which deliver 40 Terabits per second (Tbps) of extremely high-speed on-chip memory bandwidth, as well as a 72-bit DDR3 interconnect that yields more than 100 Gbps of off-chip memory bandwidth.

To complement the 16 NXCPUs, the XLP316L processor offers fully-autonomous processing engines that provide independent and complete offload of certain network functions from the NXCPUs, including:
* 10 Gbps of encryption/decryption/authentication, including support for Kasumi and SNOW3G protocols that are required for mobile infrastructure;
* 10 Gbps Network Acceleration Engines for Ingress/Egress Packet Parsing and Management;
* Packet Ordering;
* TCP Segmentation Offload; and
* IEEE 1588 Hardware Time Stamping for Ethernet backhaul timing synchronization.

The XLP multi-core processor integrates a wide range of high-speed networking interfaces for base stations, including:
* Ultra low-latency Serial RapidIO (SRIO) Rev 2.1 with flexible support for 4x1 and 1x4 configurations, enabling connectivity to four DSP or ASIC chips;
* PCI-Express Gen2 (4x1 or 1x4 configuration);
* 8x Gigabit Ethernet (SGMII) channels;
* Dual XAUI ports;
* USB2.0; and
* XEN Hypervisor virtualization and serial I/O virtualization (SRIOV).