OFC/NFOEC 2011, LOS ANGELES & SANTA CLARA, USA: NetLogic Microsystems Inc. will showcase an innovative portfolio of high-performance, market-leading 10-100 Gigabit Ethernet (GbE) PHY/SerDes devices at the Optical Fiber Communication Conference and Exposition (OFC/NFOEC) 2011 in the Los Angeles Convention Center in Calif., from March 8-10, at booths 1757 and 1756.
Recently, bandwidth upgrades to 10Gbps and beyond are being driven in all segments of the infrastructure by the strong demand for video, IPTV, social networking, peer-to-peer and virtualization services over the Internet. This has resulted in the adoption of 10G infrastructure in data centers, enterprises and service provider networks across the globe – with some early adopters deploying 40GbE and 100GbE systems. To address these different market segments, NetLogic Microsystems has developed a portfolio of 10G/40G/100G PHY/SerDes products, and will be providing live-demonstrations of these PHY/SerDes products at the OFC/NFOEC show. The following demos are planned:
* Quad-channel 10G PHY devices with SFP+ SR and direct-attached copper
* 40G PHY devices with QSFP+ 40G optical modules
* Quad-channel 10G PHY/SerDes devices with EDC (10GBASE-LRM)
* 10GbE devices for backplane applications (10GBASE-KR)
* 40GbE/100GbE applications with MLD interfaces
NetLogic Microsystems’ portfolio of devices supports 10Gbps SFI-to-XFI, SFI-to-XAUI and RXAUI, nPPI to nAUI, 10GBASE-KR and KR4 to XFI, XAUI and RXAUI, and XLAUI and CAUI to MLD. Interoperability with SFP+ and QSFP+ optical modules from all the major optical module vendors will be demonstrated.
NetLogic Microsystems will also be showcasing its quad-channel PHY/SerDes devices with its industry-leading electronic dispersion compensation (EDC) technology. The EDC engine has proven interoperability with several SFP+ modules for 10GBASE-LRM applications and utilizes a combination of analog and digital techniques to provide substantial margin with the standard IEEE pre-cursor, post-cursor and symmetric pulses, along with the dynamic stressor conditions.
All the devices provide full PCS, PMA, and XGXS sub-layer functionality, encode/decode/alignment logic, FIFOs, on-chip clock drivers, multiple loop-back features and PRBS and Ethernet frame generation and verification for both the line side and the system side.
In addition, NetLogic Microsystems will be demonstrating its PHY/SerDes devices for backplane applications. The demonstration will showcase an advanced capability to drive over one meter of standard FR4 backplanes at rates of 10Gbps and 40Gbps. These devices also integrate a state-of-the-art low-power EDC engine targeted at the 10GBASE-KR and KR4 standards.
All of NetLogic Microsystems’ 10GbE PHY/SerDes devices are compliant with the IEEE 802.3az Energy Efficient Ethernet standard and integrate 3-tap transmit pre-emphasis, automatic receive link margin calibration and forward error correction (FEC) technologies to achieve best-in-class performance and robustness of serial data transmission over a wide variety of media.
NetLogic Microsystems’ 10G/40G/100G devices also offer best-in-class power consumption of approximately ½ Watt per channel for data center applications and approximately 1 Watt per channel for enterprise applications.