Monday, September 27, 2010

Applied Materials delivers critical photomask etch technology for 22nm lithography

SANTA CLARA, USA: Applied Materials has launched its new Applied Centura Tetra X Advanced Reticle Etch system – the only system capable of etching the photomasks needed for customers’ most challenging device layers at 22nm and beyond.

Expanding the capabilities of Applied’s industry-standard Tetra III platform, the Tetra X breaks the 2nm critical dimension uniformity (CDU) barrier across all feature sizes – delivering the critical mask accuracy that can enable mask makers to exceed their customers’ strictest pattern-to-specification requirements for all device types.

“Next-generation lithography techniques place tremendous demands on the mask where accuracy of the pattern is crucial,” said Ajay Kumar, vice president and general manager of Applied’s Mask and TSV Etch product division.

“Only the Tetra X system delivers the technology necessary to achieve this accuracy, enabling chipmakers to optimize lithography process capability for their highest performing memory and logic chips. This state-of-the-art system, which has already been qualified for 22nm production at a leading mask shop, demonstrates our continued commitment to providing photomask customers with world-class etch technology.”

The Tetra X system’s uniformity performance uniquely enables enhanced lithography resolution for demanding double-patterning and source-mask optimization (SMO) techniques by delivering highly uniform, linear etch across all features sizes and pattern densities while maintaining virtually-zero defectivity.

The Tetra X system employs a wide range of system enhancements, including proprietary, real-time process monitoring technology to enable the next-generation hard mask, opaque MoSi, and quartz etch processes used to fabricate advanced binary and phase shift photomasks.

Applied’s Tetra systems have been used by mask makers worldwide to etch the vast majority of high-end masks over the last five years including virtually every 32nm node and EUVL development mask.

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