14th VLSI Design and Test Symposium conducted at Chitkara University

HIMACHAL PRADESH, INDIA: The 14th VLSI Design and Test Symposium (VDAT) was held in the picturesque campus of Chitkara University, Himachal Pradesh, during July 7-9, 2010. VDAT is an annual activity of the VLSI Society of India, and was initiated to provide a discussion forum for Indian academicians and industry professionals working in the areas related to VLSI.VDAT also provides a forum for industry-academia interaction; typically, 50 percent of VDAT attendees are industrial professionals and 50 percent come from Indian academic institutions.

VDAT also attracts some international participation. With a view to spread VLSI research and development to all parts of India, the VLSI Society of India has taken a conscious decision to take VDAT to smaller cities. Chitkara University, whose campus is located at the foothills of Shivalik mountains and is about an hour’s drive from Chandigarh, hosted VDAT 2010.

The technical program of VDAT 2010 included five pre-conference tutorials, three keynote talks, an invited talk and an embedded tutorial, a panel discussion, and about 40 research paper presentations which were selected from a pool of 150+ submissions by an a committee of The pre-conference tutorials were held on July 7 and were conducted by known experts from industry and academic institutions.

The tutorial topics included “Fundamentals of Power Management Architecture Design and Verification,” “VLSI and System Design for Solar PV Energy Management,” “Network on Chip,” “Video Codecs for Embedded Multimedia Systems,” and “An Overview of VLSI Design and Test.”

The conference was formally inaugurated in a colorful ceremony on July 8, 2010 by traditional “lighting of the lamp” ceremony by Dr. C.P. Ravikumar, Secretary of VLSI Society of India, Dr. Madhu Chitkara, Pro Chancellor of Chitkara University, Brig. (Dr.) R. S. Grewal, the Vice Chancellor of Chitkara University, Prof. Vishwani Agrawal, Auburn University and Chairman of the Steering Committee of VSI, Jaswinder Ahuja Corporate VP and Managing Director, Cadence Design Systems, India), Hasmukh Ranjan, the Vice President (IT) of Synopsys and Dr. S. Chatterji (Vice President, IEEE Chadigarh chapter).

Unlimited opportunities in India
Jaswinder Ahuja delivered a keynote talk entitled “Opportunity Unlimited – Emerging Markets in India,” where he outlined the research and development opportunities that the VLSI community in India can seize. India has come a long way in the area of VLSI design and has established itself as a hub of design activity.

There are unlimited opportunities for design and manufacture that are waiting to be tapped and the major growth areas are smart phones, medical, smart grid, and many other emerging areas. Ahuja sprinkled his talk with a number of examples of innovation that have happened in India and stressed that India has what it takes to come out as a winner in the arena of VLSI and embedded system design.

Hasmukh Ranjan delivered a keynote talk on “Cloud Computing – Opportunities for EDA,” where he explained the importance of cloud computing for VLSI design companies. Companies can get access to unlimited amount of computing resources through cloud computing without making a significant capital expense. A number of EDA companies are making available software as well as IP to design companies through the cloud. There are many R&D challenges to be conquered in the area of Cloud Computing, such as security and multi-vendor flows.

Prof. Anshul Kumar gave a keynote talk on the topic of ‘Harnessing the power of multicores.” His talk provided a tutorial overview of the various multicore architectures that have become popular for general-purpose as well as embedded computing. He explained the architectural variations of multicores and the challenges posed by multicore architectures, such as programming, compilers, operating systems and debugging.

Electronic design challenges and opps
A panel discussion was held on the topic “Electronic design for the Indian market – Challenges and Opportunities,” which was moderated by C.P. Ravikumar. The panelists included Prof. M. Balakrishnan of IIT Delhi, Saugat Sen of Cadence Design Systems, and Aninda Roy of Intel. The panelists presented their views on what they feel is a killer product for the Indian market and what differentiates product design for the Indian market from product design for the American and European markets.

A discussion ensued on what competencies must be inculcated in the graduating design engineers to face the challenges of product design. The audience brought up a number of issues related to education in the Indian universities and how it must respond to the emerging wave of electronic product design.

A discussion meeting was hosted by the VLSI Society of India to promote academia-industry interaction. The meeting was attended by over 40 participants, who debated on many real issues facing the students and faculty in Indian engineering colleges. Several suggestions emerged on how these problems can be addressed.

More than 40 research papers on topics such as VLSI architecture, Electronic Devices, Network-on-Chip, Physical Design, and Testing and Verification, were presented. These papers represented the ongoing research in Indian industries and academic institutions. The presenting authors benefited from the vibrant Q&A that followed these presentations.

The conference ended with a nostalgic valedictory session by mentioning the efforts put in by General chair of the conference, Mohit Chitkara (Vice President, Chitkara Educational Trust) and Local Organization Chair Dr. Rajnish Sharma (Dean, Academics, Chitkara University) in making event a grand success.

Special mention was made of the continued support of Dr. Ashok Chitkara (Chancellor, Chitkara University) and Dr. Madhu Chitkara (Pro Chancellor, Chitkara University) for successful organization of the conference. Efforts of volunteer faculty members of Chitkara University was recognized by awarding certificates of appreciation to Dr. Ajay Sharma, Ms. Pooja Arora and Ms. Sandhya Sharma.

About 180 participants attended the 14th VLSI Design and Test Symposium.