MOUNTAIN VIEW, USA & SHANGHAI, CHINA: Synopsys and Semiconductor Manufacturing International Corp. (SMIC) have announced the immediate availability of Synopsys' silicon-proven and USB logo-certified DesignWare USB 2.0 nanoPHY intellectual property (IP) for SMIC's 65 nanometer (nm) low- leakage (LL) process technology.
As a leading provider of complete IP solutions for the USB 2.0 interface including controllers, PHY and verification IP, Synopsys continues to help designers lower integration risk by providing high-quality IP that is proven interoperable and compliant to the USB 2.0 standard specification.
The DesignWare USB 2.0 nanoPHY IP is designed for a broad range of high-volume mobile and consumer applications where the key requirements include minimal area and low dynamic and leakage power consumption.
In addition, the DesignWare USB 2.0 nanoPHY IP has built-in tuning circuits designed to enable quick, post-silicon adjustments to account for unexpected chip/board parasitic or process variations, without having to modify the existing design. This allows designers to increase yield and minimize the cost of expensive silicon re-spins.
"The combination of Synopsys' silicon-proven DesignWare USB 2.0 nanoPHY IP and SMIC's low-leakage 65 nm process technology allows our mutual customers to easily integrate advanced features into a process that helps them meet their low power requirements and quickly ramp into volume production," said Chris Chi, senior vice president and chief business officer of SMIC.
"Recent silicon success with customers leveraging SMIC's 65 nanometer LL process and Synopsys' USB2.0 nanoPHY IP gives us confidence to strengthen our strategic and synergistic relationship with Synopsys to deliver significant advantages to our customers through industry-leading integration, power efficiency and cost efficiency. We look forward to working with Synopsys as we move toward more advanced process nodes."
"By making available Synopsys' high-quality DesignWare USB 2.0 nanoPHY for the SMIC 65 nanometer LL process technology, we continue to provide designers with the IP they need for today's required foundry processes," said John Koeter, vice president of marketing for the Solutions Group at Synopsys.
"Working with SMIC to silicon-validate our USB 2.0 nanoPHY IP in their 65 nanometer LL process provides our customers with proven and certified IP solutions that enable them to integrate DesignWare IP with less risk and improved time-to-market."
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