USA: Xilinx Inc. is enabling broadcast equipment OEMs to speed development of next-generation smarter solutions with today’s announcement of the availability of the 2.1 release of its Real-Time Video Engine (RTVE), which runs on the OZ745 Zynq-7045 All Programmable system-on-a-chip (SoC) baseboard from OmniTek, a Certified Xilinx Alliance Program Member.
Announced NAB 2013 (booth #N311), the RTVE 2.1 is a key component of the Xilinx All Programmable Smarter Vision solutions, which combines the Zynq-7000 All Programmable SoC, Vivado High-Level Synthesis (HLS) with IP integrator software tools, OpenCV libraries, SmartCORE IP and hardware development kits to accelerate the development of applications requiring rich video analytics and exceptional real-time performance.
“The RTVE 2.1 is a comprehensive video system reference design developed with OmniTek that OEMs can use to develop new professional monitors, digital cinema projectors, routers, switchers, multiviewers, cameras and other key broadcast equipment that require high-performance video processing, particularly with multiple video streams,” said Ben Runyan, director of Broadcast and Consumer Marketing at Xilinx.
“The RTVE 2.1 is architected using the Zynq-7000 All Programmable SoC for a scalable solution that integrates up to eight simultaneous 1080p60 video channels in a single device with additional functionality running on the ARM® dual-core Cortex™-A9 MPCore™ processor and is the optimal platform to address the growing ASIC and ASSP gaps in video-based applications.”
The RTVE 2.1 reference design allows for multiple video processing pipelines, running at 10-bit color depth and full 4:4:4 color subsampling and now includes a web-based GUI for easier control of the reference design. The new RTVE 2.1 release also introduces several enhancements that improve efficiency and usability, including:
* Support for up to eight channels of video for increased system performance in the same area of silicon.
* OmniTek’s Scalable Video Processor (OSVP) with an integrated deinterlacer/scaler along with a robust multi-port video direct memory access (VDMA) technology to minimize resources used while maintaining this high performance.
Tuesday, April 9, 2013
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