Tuesday, April 16, 2013

Flexras enhances Wasga compiler partitioning tool

FRANCE: Flexras Technologies, the provider of high performance partitioning software, announced the release 3.2 of its WasgaCompiler Design Suite for FPGA-based prototyping.

This new release supports the Xilinx Virtex-7 FPGA and includes new features that accelerate SoC rapid prototyping.

Flexras will demonstrate Wasga Compiler for the Virtex-7 FPGA-based systems at DAC, Booth #1324, June 2-5, 2013, Austin,TX, USA.

“Flexras' announcement of their support of the Vivado Design Suite and the Virtex-7 FPGA platform clearly reinforces Xilinx’s leadership in this marketplace. The tremendous growth in ASIC SoC complexity is fueling the demand for ever larger FPGAs and multi-chip partitioning tools,” says Kirk Saban, Virtex-7 Product Line Manager at Xilinx.

“Collaboration with Xilinx has allowed us to optimize our partitioning flow for next generation SoC implementations based on Virtex-7 All Programmable FPGA-based prototyping systems,” said Hayder Mrabet, CEO of Flexras Technologies.

“With its  timing-driven automatic partitioning and high speed Virtex-7 FPGA Advanced Pin Multiplexing (APM) IP for inter-FPGA communications, Wasga Compiler enables very fast prototyping of complex SoCs, achieving efficient results in days, or even hours.”

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