Wednesday, December 19, 2012

HDL Design House MIPI M-PHY and D-PHY solutions available in 40nm and 65nm

SERBIA: HDL Design House, provider of high performance digital and analog IP cores and SoC design and verification services, today announced availability of MIPI M-PHY and D-PHY solutions in advanced technology nodes.

MIPI M-PHY and D-PHY solutions are fully compliant with the MIPI Alliance M-PHY and D-PHY specifications version 1.0, as the latest addition to HDL Design House FlexIP core library. These IP solutions can be combined with HDL Design House MIPI DSI and CSI-2 IP cores. As a MIPI Alliance Contributor member since 2010, HDL Design House offers high quality, silicon proven M-PHY and D-PHY solutions, available in 40nm and 60nm.

HDL Design House MIPI D-PHY is a high speed serial interface used for communication between components inside a mobile device. MIPI D-PHY can be used for point-to-point serial communications in high speed links like serial display interfaces (DSI), serial camera interfaces (CSI) and MIPI UniPro based module.

The D-PHY Link includes a high speed signaling mode for both fast data traffic and low power signaling mode for control signal purposes. The D-PHY configuration consists of one Clock Lane and up to 4 Data Lanes, and the number of Data Lanes is configurable.

Each Lane consists of an analog front end to generate electrical levels, detects signals from interconnects and translates them into digital values and control and interface logic to control I/O functions. It supports PPI (PHY Protocol Interface), and bandwidth ranges from 800 Mbps to 1 Gbps per lane depending on the process node.

HDL Design House MIPI M-PHY is a high frequency, low power IP compliant with the MIPI Alliance Standard for M-PHY version 1.0. It can be used as Physical Layer for interfaces such as camera, display, audio, video, power management and communication between BB (Base Band) and RFIC.

MIPI M-PHY supports two modes: HS (High Speed) and PWM LS (Pulse Width Modulation Low Speed), and power efficiency throughput is ensured by using burst mode. It supports both optical and electrical interfaces and multiple power saving modes. HDL Design House MIPI M-PHY can ensure data rates from 10Mbps up to 6Gbps.

HDL Design House D-PHY IP core can be used in tandem with MIPI DSI and CSI IP cores. HDL Design House MIPI M-PHY IP core can be combined with UniPro, LLI and DigRF digital controllers, also available from HDL Design House FlexIP core library.

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