MOUNTAIN VIEW, USA: Synopsys Inc. has completed the acquisition of Extreme DA™, a privately held company headquartered in Santa Clara, California that develops software to improve integrated circuit (IC) design performance, power consumption and manufacturing yields.
The acquisition extends Synopsys' expertise in static timing analysis and multicore software development by adding technology and engineering talent to accelerate advancements in Synopsys' timing analysis solutions. In addition to having access to technology that can help them address Giga-scale design challenges, customers will benefit from a world-class sales support team. The terms of the acquisition, which closed October 6, have not been disclosed.
"Synopsys is committed to helping designers of next-generation ICs meet the productivity and performance challenges created by the demand for smart electronics and mobile devices," said Antun Domic, senior VP and GM of Synopsys' Implementation Group. "The combination of Synopsys and Extreme DA's technological capabilities and team expertise will help enable Synopsys to deliver best-in-class tools that address the scalability, convergence and throughput needs of our customers' massive designs."
"We believe our customers will be pleased with this combination as it brings together the best of each of our respective product lines for the continued advancement of critical timing analysis capability in an era of exploding design complexity," said Mustafa Celik, CEO of Extreme DA."
Synopsys PrimeTime timing analysis is recognized as the golden, trusted signoff solution for timing, signal integrity, power and variation-aware analysis. It helps pinpoint problems prior to tapeout, thereby reducing risk, ensuring design integrity and lowering the cost of design. In 2010, Synopsys introduced PrimeTime HyperScale technology, enabling static timing analysis (STA) to scale beyond 500 million instances.
Extreme DA is recognized for ushering in the first commercial statistical static timing analysis (SSTA) tool suite, and for later introducing the ability to statistically model on-chip variation without the need for expensive cell library characterization in its GoldTime™ static timing analysis tool.