27 percent of total processed semiconductors are thinned today; in 2016, this ratio will exceed 50 percent: Yole

LYON, FRANCE: Yole Développement announced its report Thin Wafer Market & Applications. Thin wafers will be increasingly used in many diverse applications. The Yole Développement “Thin Wafer Market & Applications” report describes the applications that require thin and ultra-thin wafers: MEMS, CMOS image sensors, 3D packaging (including, interposers), memories, RF devices, power devices and LEDs.

While memories and logic will account for the largest fraction of thinned wafers, many other applications are concerned.

Thin wafers target many apps
MEMS are always characterized by a wide range of process and technologies. This is certainly the application where the widest range of wafer thickness can be found (e.g. the 3-axis gyro from InvenSense is a stack of 3 wafers with intermediate layer of 33μ thickness). To answer the need for thinner sensors for cell phone apps, capping, sensitive elements and MEMS ASIC will get thinner over the next years, specifically for inertial MEMS.

For CMOS image sensors (CIS), backside illumination (BSI) now enables 100 percent fill-factor, which opens the opportunity for CMOS sensor with higher sensitivities or higher resolution. However, we need to handle very thin layer as for a BSI CIS, the active layer is <10μ. CIS wafers will also be thinner for packaging purposes (TSV, WLCSP).

“Memories can be stacked in different ways: wire bonding or TSV. 3D stacking is the next big thing for memory integration with thickness as low as 25μ in 2016. But wire bonding will still be used for a few years and TSV volume will start to be significant in 2013,” says Dr Mounier, Yole Développement.

Main power devices requiring thin wafers are IGBTs but others power devices could use thin wafers. For power devices, thin wafers allow low ron, thus improve current carrying capability and minimize power consumption. For LEDs, GaAs, sapphire and SiC wafers are thinned as well.

Market drivers for thin wafers
Motivations for thin wafers are: high interconnect density (such as aggressive TSV pitch and diameters), better power dissipation and higher electrical performance and reduced package size.

Consumer electronics are driving the need for smaller, higher performing, lower cost device configurations for use in applications such as memory, wireless devices. These new options, in turn, are pushing demand for a reduction in chip thickness from the traditional 500μ thickness to about 40 μm. Thin dies are driving the need for thin and even ultra-thin semiconductor wafers (below 50μm).

Such dramatic changes will have strong impact on the equipment and materials side as well as new process and bonding technologies will be required for handling such fragile wafers.

Yole Développement has covered the equipment and processing aspects in the previous “Thin Wafer Manufacturing Equipment & Materials Market” report.