SpringSoft’s ProtoLink probe visualizer speeds verification of FPGA-based prototype boards

HSINCHU, TAIWAN: SpringSoft, Inc., a global supplier of specialized IC design software, introduced the ProtoLink Probe Visualizer to dramatically increase design visibility and simplify debug of FPGA-based prototype boards. The new Probe Visualizer uses patented interconnect innovations and software automation with the industry-leading HDL debug platform to shorten the verification cycle of off-the-shelf or custom-designed prototypes and maximize their return on investment for early validation of system-on-chip (SoC) designs.

Prototype boards are widely used today to verify that critical design modules or entire systems function correctly because of their fast running speeds and low cost. However, board deployment is often delayed and limited to late in the development cycle because they are inherently difficult to setup and lack the visibility needed to adequately debug designs.

SpringSoft’s Probe Visualizer changes this paradigm with the ability to probe large numbers of signals over many cycles, easily add/change signals with fast probe ECO flow, and accelerate debug of designs at the register transfer level (RTL) with SpringSoft’s Verdi Automated Debug System.

SpringSoft is targeting the prototype verification market with the immediate release of Probe Visualizer as the newest addition to SpringSoft’s award-winning family of verification enhancement products and a major milestone in the company’s mission to accelerate functional closure of complex SoC designs.

“As the capacity and performance of FPGAs get bigger and better, more companies are moving to a FPGA prototyping approach for system-level validation. But, implementation complexity and debug capabilities are still the critical path factors that get in the way of prototype deployment,” said Yu-Chin Hsu, vice president of the Verification Technology and Product Group at SpringSoft. “Probe Visualizer addresses the tremendous verification burden this puts on prototype developers and SoC teams. It uses intuitive, software-based methods to achieve a high level of design visibility and make prototype boards easier to debug starting at the early RTL design stage all the way through final implementation.”

“Given the complexity of multi-processor SoC designs, traditional FPGA prototype flows are not practical due to poor design visibility, extended debug cycles, and costly iterations required to change probes,” said Wen-Ching Wu, director of Design Automation Technology, Division of Information and Communications Research Laboratories (ICL) at Industrial Technology Research Institute (ITRI).

“SpringSoft’s ProtoLink Probe approach enables us to adopt a more flexible FPGA verification methodology and brings the power of Verdi debug to the prototype board. We are very encouraged with the early results and look forward to leveraging the real-time visibility and faster debug benefits for a broad range of system prototypes.”