Monday, April 12, 2010

TSMC certifies Berkeley Design Automation analog FastSPICE for 28nm LP process

SANTA CLARA, USA: Berkeley Design Automation Inc., provider of the Analog FastSPICE unified circuit verification platform today announced that the Analog FastSPICE Platform qualified through TSMC’s SPICE Tool Qualification Program for 28nm low-power (LP) technology.

Analog, mixed-signal, and RF design teams at leading semiconductor companies worldwide now can use Analog FastSPICE Platform to efficiently verify their 28nm LP projects.

"The Berkeley Design Automation Analog FastSPICE Platform is one of the first SPICE simulators to meet all the accuracy and compatibility requirements of TSMC’s SPICE Tool Qualification Program for 28nm LP technology,” said Tom Quan, Deputy Director of Design Service Marketing at TSMC.

The Berkeley Design Automation Analog FastSPICE Platform (AFS Platform) is a unified circuit verification platform for analog, mixed-signal, and RF design. The company states that the AFS Platform delivers true SPICE accurate results, while providing higher throughput and larger simulation capacity than traditional SPICE, with comprehensive device noise analysis.

The AFS Platform is a single executable that uses advanced algorithms and numerical analysis to rapidly solve the full-circuit matrix and original device equations without any shortcuts. The AFS Platform includes licenses for AFS Nano SPICE simulation, AFS circuit simulation, AFS Co-Simulation, AFS Transient Noise Analysis, and AFS RF Analysis.

"Our 28nm LP certification via the TSMC SPICE Tool Qualification Program is an important milestone to support our mutual customers’ success as they move to this advanced node," said Ravi Subramanian, president and CEO of Berkeley Design Automation.

"By working closely with TSMC, we can provide assurance that these customers have the verification tool that has the accuracy required for the most complex and highly integrated nanometer analog/RF designs."

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