SAN JOSE, USA: Magwel N.V. announced that STMicroelectronics has selected Magwel’s DevEM tool for use in design and verification of high speed I/O circuitry. This selection comes after extensive evaluation of DevEM on structures and circuits developed for their most advanced process nodes.
“ST designs some of the most advanced and high performance ICs in the world and all layers of the stack can affect performance,” said Philippe Galy, Manager of Advanced Library Design & Solutions in the Central CAD Design and Solution group at STMicroelectronics, Crolles-France.
“The Magwel product was able to comprehend the parasitic coupling between metal stack (BEOL) and semiconductor circuitry (FEOL) and provide accurate results that match silicon. With better extraction and simulation from Magwel, we will be able to optimize circuit performance and reduce the need to build test silicon.”
Magwel combines the world of EM and TCAD into a single and self-consistent analysis engine, while also offering the highest capacity of any full-wave 3D extractor in the industry.
“ST, like our other customers, is experiencing significant returns on investment,” said Dündar Dumlugöl, CEO of Magwel. “DevEM, along with our Power Transistor Modeling tool, offers customers an unparalleled 3D simulation and extraction accuracy that closely matches silicon and minimizes re-spins.”