ARM CoreSight extends real-time system visibility to all software developers

CAMBRIDGE, UK: ARM announced at the Embedded Systems Conference in San Jose the launch of the ARM CoreSight System Trace Macrocell and Trace Memory Controller providing software and system on chip (SoC) developers with a cost effective, industry-standard debug and optimization SoC platform solution.

The ARM CoreSight System Trace Macrocell (STM) extends to all software developers, in particular application and kernel developers, real-time visibility of software and hardware execution enabling a low latency and high bandwidth hardware assisted instrumentation debug capability; unlike pure software instrumentation STM delivers more visibility without impacting the SoC behavior.

STM builds upon the success of instrumentation trace, which has been widely adopted in the microcontroller market and supported by Keil tools, and provides software developers with the means of tuning software for both robustness and faster execution on ARM processor-based systems.

The CoreSight Trace Memory Controller (TMC) eliminates the need for dedicated trace interfaces and enables the SoC designer to use existing system memory to collect trace information. Real-time on-chip visibility is made available to all developers, including OEM third party software developers, enabling use of real-time trace information right up to the point of mass production, improving product quality and reducing implementation cost.

ARM worked with a number of leading OEM Partners and the Mobile Industry Processor Interface (MIPI®) Alliance to define the system trace technology.

"As the complexity and performance of mobile devices increases, test and debug is a crucial activity for the MIPI Alliance. ARM leadership in debug and trace is a key asset for MIPI," said Joel Huloux, Chairman of the Board, MIPI Alliance Inc. "By providing System Trace IP that is designed to comply with the MIPI specifications ARM will make System Trace a de-facto standard across industries."

"On-chip visibility is critical to product success. We see so many engineering projects which would fail if they were unable to debug system problems," said Stephan Lauterbach, General Manager, Lauterbach GmbH. "The new CoreSight IP makes hardware assisted debug affordable and usable by all, this is a key milestone for the debug and trace industry."

"ARM silicon Partners have been implementing the CoreSight debug and trace infrastructure in their chipset designs for several generations," said Mike Dimelow, Director of Marketing, Processor Division, ARM. "The CoreSight STM will enable an OEM's third party software eco-system to take advantage of hardware-based debug and trace for the first time, making ARM processor-based silicon the easiest platform on which to optimize software."

The ARM CoreSight STM and Trace Memory Controller are available for licensing now. Tool support by ARM is planned for the second half of 2010.