Lattice updates ispLEVER FPGA design tool suite

HILLSBORO, USA: Lattice Semiconductor Corp. announced the immediate availability of Service Pack 1 for Version 8.1 of its ispLEVER FPGA design tool suite. Service Pack 1 is an important update for designers targeting mid-range LatticeECP3 devices using the ispLEVER tool suite.

Updated support for LatticeECP3 FPGA family
Service Pack 1 updates the device values to production characterized silicon for the entire LatticeECP3 family, including the more recently announced ECP3-35EA and ECP3-17EA devices. With SP1, power calculation, static timing analysis, timing simulation and simultaneous switching noise calculation will report results that even more accurately reflect the behavior of the actual production device.

Support for Platform Manager devices
In conjunction with the upcoming release of PAC-Designer 6.0 software, ispLEVER 8.1 Service Pack 1 supports the new programmable mixed signal Platform Manager devices. For new users, a free version of this design flow will be available with the Starter version of ispLEVER 8.1 SP1 software.

ispLEVER design tool suite
Lattice Diamond FPGA design software is now the flagship design environment for the latest Lattice FPGA products; however, ispLEVER software support continues as users migrate their FPGA projects.

The ispLEVER software provides a complete set of powerful tools for all design tasks, including project management, IP integration, design planning, place and route, in-system logic analysis and more. The ispLEVER software can no longer be purchased separately; however, a Lattice Diamond Subscription License also enables access to the ispLEVER environment. Synopsys’ Synplify Pro advanced FPGA synthesis is included for all operating systems supported, and Aldec’s Active-HDL Lattice Edition simulator is included for Windows.

The ispLEVER 8.1 Service Pack 1 tool suite for Windows and Linux users is available immediately without charge for ispLEVER 8.1 users.