HiSilicon adopts Cadence mixed-signal and low-power technologies

SAN JOSE, USA: Cadence Design Systems Inc. announced that HiSilicon Technologies Co. Ltd has expanded its collaboration with Cadence on its advanced wireless and networking chip designs.

HiSilicon has expanded its use of the Cadence Encounter Digital Implementation System, Encounter Power System and Virtuoso custom design technologies in its low-power and mixed-signal flows at advanced technology nodes.

HiSilicon has also adopted the Cadence Encounter Conformal ECO Designer in its engineering-change-order flow to help designers reduce both cost and impact on schedules resulting from late iterations.

Headquartered in Shenzhen, China and formerly known as the ASIC Design Center of Huawei Technologies Ltd., HiSilicon has design divisions located in Beijing, Shanghai, Silicon Valley (USA) and Sweden.

HiSilicon provides ASICs and solutions for communications networks and digital media. These ASICs are widely used in over 100 countries and regions around the world. In the digital media field, HiSilicon has already released an SoC and solution for network surveillance, videophone, DVB and IPTV.

Adopting the Cadence technologies enables HiSilicon to improve the productivity of its engineering groups in implementing low-power designs. The Cadence Encounter Digital Implementation System—with its robust technology and low-power support for multiple power domain designs—allows HiSilicon to leverage more effective power-saving techniques, such as power shutoff and voltage scaling.

The mixed-signal capabilities within the Cadence Virtuoso custom design technologies and the Encounter Digital Implementation System allow HiSilicon’s analog and digital design teams to collaborate more effectively by making digital implementation capabilities accessible from within the custom design environment, and vice versa.

With these capabilities, as well-mixed signal and low-power signoff, the Encounter Digital Implementation System provides HiSilicon with a complete implementation and signoff solution for mixed-signal and low-power designs.

"After careful evaluation, we have chosen Cadence as the primary vendor of our low-power and mixed-signal design flows,” said Teresa He, vice president of HiSilicon. “Today’s global semiconductor market is highly competitive and we are happy to sharpen the saw with the leading technologies from Cadence.”

“Cadence is committed to enabling our customers to build their most challenging designs with improved productivity and higher profitability,” said Charles Giorgetti, corporate vice president for product management at Cadence. “We are honored to see HiSilicon expand the use of our leading solutions, and confident that Cadence can help HiSilicon gain a competitive edge in the wireless, networking and digital media markets through our strong collaboration.”