Pericom launches HiFlex clock generator family

USA: Pericom Semiconductor Corp. has introduced a new family of HiFlex clock generators offering multiple frequency outputs with very low jitter, high integration, and high flexibility - perfect for use in networking, cloud computing,  and other high performance platforms that require multiple frequencies and outputs.

The new HiFlex clock generator family is designed to drive down the Bill of Materials (BOM) cost and to increase board space utilization of the timing tree. By integrating multiple components of a timing tree into a single clock generator IC, instead of using crystal oscillators (XOs) and fan out buffers, Pericom’s family of HiFlex clock generators enables cost savings without sacrificing the necessary performance of customer designs.

One of the main drivers of growth today in the networking segment is the growth in cloud computing and services. According to Forrester Research, cloud computing is projected to be a $241 billion market by 2020 and the infrastructure market has a significant portion of it.

Pericom’s HiFlex clocks can provide the high performance timing needed for infrastructure, enterprise networking, and data center servers that are part of the cloud-computing ecosystem. Various Tier 1 networking system manufacturers in North America, Asia and Japan have already deployed this family of innovative products in their equipment.

“Timing is absolutely critical in high performance systems to ensure everything is in sync,” said Wendy Zhou, marketing director for Pericom’s Timing group. “Traditional XOs can provide very good jitter performance, but lack flexibility in terms of output frequency, number of outputs, and also increase board space and costs. Pericom’s HiFlex clock family provides a better alternative to system engineers who want a simple and easy design clock tree that meets all performance requirements.”

Key features and benefits of the HiFlex clock IC family include: multiple frequency outputs specific to key protocols,  user programmable frequencies across different output protocol types via pin strapping or I2C, jitter performance comparable to traditional XO products, and reduced BOM cost and board space.