TAIPEI, TAIWAN: Aldec Inc., a global leader in electronic design verification, has entered into a distribution agreement with Avnet Electronics Marketing Asia.
The agreement between Aldec and Avnet, one of the world’s largest distributors of electronic components, computer products and embedded technology, will serve the Asia Pacific region. Under the terms of the agreement, Avnet Electronics Marketing will promote and distribute Active-HDL (Designer Edition), Aldec’s mixed-language FPGA design creation and simulation product.
“We are excited to have a strong partner to cover the increasing number of FPGA designers in Asia seeking mixed-language simulation and support for the most advanced FPGAs on the market,” said David Rinehart, VP of Aldec. “Aldec offices throughout China, Taiwan and India will work closely with Avnet Asia technical resources to provide world-class technical support and a scalable migration path to advanced verification solutions for SystemVerilog, SystemC and 64-bit operating systems.”
“As one of the largest FPGA distributors in China, the Avnet team will promote the Active-HDL from Aldec into our FPGA customer base,” said Victor Koh, regional president of Avnet Memec China.
Active-HDL was awarded the 2010 Best FPGA Development Tool by the Ministry of Industry and Information Technology of the People’s Republic of China. The award recognized Active-HDL as the superior choice for FPGA designers in China based on its powerful, easy-to-use FPGA design creation, project management, mixed VHDL and Verilog verification, and excellent documentation toolset.
Wednesday, June 1, 2011
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