MIPS intros new processor cores with 32-bit performance and near 16-bit code size

SUNNYVALE, USA: MIPS Technologies Inc. today introduced a new core family providing the highest levels of system performance for extremely cost-sensitive embedded applications such as 32-bit microcontrollers (MCUs), home entertainment, personal entertainment and home networking.

The new MIPS32 M14K and M14Kc cores are the first MIPS32-compatible cores that also execute the new microMIPS instruction set architecture (ISA), achieving high performance of 1.5 DMIPS/MHz with an advanced level of code compression. The microMIPS ISA maintains 98 percent of MIPS32 performance while reducing code size by 35 percent, translating to significant silicon cost savings.

According to Art Swift, vice president of marketing at MIPS Technologies: "Growing amounts of signal processing and higher speed connectivity are driving up the performance requirements in MCUs and many cost-sensitive embedded applications, while still requiring a very small silicon footprint.

"We’re enabling our customers to develop high-performance devices in smaller form factors to significantly decrease development costs. We’re pleased to enhance and expand our offering for MCU and system designers with these groundbreaking new cores."

"MCUs continue to migrate towards 32-bit to address the needs of more sophisticated, performance-intensive applications,” said Tony Massimini, chief of technology, Semico Research.

"Processors that support 32-bit MCUs and other high-performance, low-footprint embedded devices must not only provide the requisite performance and right feature set, but they also need to be extremely compact to keep flash memory and silicon costs down. This enables smaller die area which allows for further integration. The specifications of the new M14K cores suggest great promise for the next generation of these devices.”

M14K core for microcontrollers
The M14K core combines high performance with an advanced level of code compression for the 32-bit MCU market, achieving performance of 1.5 DMIPS/MHz and 180 MHz in 130nm.

The M14K core offers advanced features that are optimized for MCU and real-time embedded applications, including reduced interrupt latency, flash acceleration, advanced debug features including iFlowTrace and support for AHB Lite as the interconnect interface.

Designed on the MIPS32 4K micro-architecture that is already proven in hundreds of millions of SoCs, the M14K core is highly configurable and extendable, offering a wide range of implementation options to minimize cost and maximize reusability.

"Microchip is delighted to see continued innovation and commitment from MIPS Technologies in the 32-bit MCU market. The new M14K and M14Kc cores, and the microMIPS ISA offer enhancements important to MCU users, including even faster interrupt latency and smaller code size," said Sumit Mitra, vice president, High Performance Microcontroller Division, Microchip Technology.

"Microchip is pleased with the enthusiastic acceptance of its MIPS-based PIC32 MCU family offering best-in-class performance. As with our 8-bit and 16-bit MCU businesses, Microchip is committed to a long term roadmap with our MIPS-based 32-bit MCU products."

M14Kc core for high performance, low footprint applications
The M14Kc core builds on the base M14K core with additional features for embedded applications such as home entertainment, home networking and personal mobile entertainment.

These applications require a compact footprint but also the ability to execute increasingly complex software algorithms on an RTOS or Linux. Based on the popular MIPS32 4KEc micro-architecture, which provides a powerful Linux and Java engine and superior performance for the Android platform, the M14Kc core has a full cache controller and translation lookaside buffer (TLB) memory management unit (MMU).

microMIPS ISA for advanced code compression
At the heart of the M14K and M14Kc cores is the new microMIPS ISA that offers 32-bit performance with 16-bit code size for most instructions.

The microMIPS ISA combines recoded and new 16- and 32-bit instructions to achieve an ideal balance of performance and code density. It incorporates all MIPS32 instructions and Application Specific Extensions (ASEs) including MIPS-3D ASE, MIPS DSP ASE, MIPS MT ASE and SmartMIPS ASE, as well as new instructions for advanced code size reduction.

The microMIPS ISA is backward compatible, enabling reuse of optimized MIPS micro-architecture. With smaller memory accesses and efficient use of the instruction cache, the microMIPS ISA also helps to reduce system power consumption.

The new M14K and M14Kc cores will be available in the first quarter of 2010.