BIELSK-BIALA, POLAND: The silicon intellectual property (IP) provider, Evatronix SA, today announced its NAND Flash memory controller has been updated to meet the latest specifications of the Open NAND Flash interface (ONFi) and now fully supports the newest High Speed NAND Flash. This allows development of applications that will leverage the ability of new memory technologies to operate with speeds of up to 200 MB per second.
“We are pleased to see Evatronix support the latest ONFI 2.2 standard with their new NAND Flash Controller,” said Kevin Kilbuck, ONFI Marketing Committee Chair.
“ONFI is dedicated to simplifying the integration of NAND flash memory into consumer electronic products, computing platforms, and other applications that utilize solid state memory as a mass storage medium. A critical component to growing adoption of ONFI-based NAND flash is to build a strong industry ecosystem, and we look forward to welcoming Evatronix into our Industry Workgroup.”
The latest release of the NAND Flash controller also implements the most advanced error correction mechanism to date. The Bose, Chaudhuri, and Hocquenghem (BCH) code can correct up to 32 bits per page, and the configuration script provided with the controller allows user to define the exact even number of bits to be corrected.
As the controller supports all types of memories - High Speed SLC, SLC and MLC memories, an advanced mechanism allows all these memories to be connected simultaneously, thus giving the SoC designer the freedom to choose the best memory for each task within his application.
“Introduction of ONFi standard is something the NAND Flash market needed on both customer’s and provider’s side,” said Arkadiusz Buchalik, the Memory Controllers Product Line Manager at Evatronix.
“The latest generation of the NAND Flash controller thus becomes an industry standard and a completely innovative product at the same time; the first one by being one of the first to support the ONFi 2.2 and 1.x specs, the latter by introducing features which now are exceptional in the market.”
The updated NAND Flash Controller IP is available now for implementation in any FPGA or ASIC technology. The IP core is delivered as an RTL source code with a set of scripts and macros for simulation/synthesis support or as an FPGA netlist targeted to the latest programmable devices.
The NAND Flash controller IP is complemented by a dedicated software driver that supports hardware features of the controller.
Wednesday, November 25, 2009
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