Synopsys expands DesignWare data converter IP portfolio with 40nm solutions

MOUNTAIN VIEW, USA: Synopsys Inc. today released a broad range of data converter IP solutions for 40-nanometer (nm) process technologies.

The IP is targeted at broadband wireless communications, wired communications, and video designs requiring high-performance, ultra-low power consumption and very compact area. With this latest addition, Synopsys' DesignWare Data Converter IP portfolio now offers more than 100 data converter IP products comprised of oversampling Sigma-Delta, Pipeline, and, SAR analog-to-digital converters (ADCs),
current steering digital-to-analog converters (DACs) and general purpose ADCs and DACs.

By providing a broad portfolio of silicon-proven, high-quality data converter IP solutions that are backed by technical experts in major geographical regions worldwide, Synopsys helps designers lower integration risk, speed time-to-market and achieve first pass silicon success for their SoC designs.

"Synopsys is well trusted in the design community for delivering silicon-proven, advanced data converter IP solutions," said Tommy Aizawa, vice president of strategic marketing for Kawasaki Microelectronics (K-Micro).

"Their high-quality products, engineering expertise and technical support are critical to helping us bring highly differentiated products to the market faster and with less risk. This enables our customers to deliver high performance network devices with unique features that are specifically targeted for home networking and access devices. Our established relationship with Synopsys through the years has enabled us to have access to a strong roadmap that we can rely on for future product developments."

The DesignWare Data Converter IP solutions meet the needs of a broad range of applications:

* For broadband wireless communications, wired communications and video applications requiring high dynamic range and low power, the DesignWare Dual Pipeline ADCs and DACs support 12-bit resolution and offer up to 200 MSPS sampling rate.
* For cellular communication applications requiring support for multiple generation protocols from 2G up to LTE, the DesignWare Dual Sigma-Delta ADCs support 12-bit resolution with the ability to process narrow and broadband channels in a power-efficient method.
* For video applications processing common high-definition TV, standard-definition TV or graphics video formats, the DesignWare Video DACs support up to 12-bit resolution and offer up to 300 MSPS sampling rate.
* For general purpose measurement applications requiring low sampling rates, the DesignWare SAR ADCs and DACs support up to 12-bit resolution and Sigma-Delta ADCs support up to 14-bit high resolution.

These full-featured data converters internally generate the required references and include additional features such as a highly flexible analog interface which simplifies the connection with RF and other transceivers, eliminating the need for external components. These elements help designers reduce silicon costs and significantly simplify the integration of the IP into an SoC.

"With more than 12 years of delivering analog IP for a broad range of applications, Synopsys continues to invest significantly in providing products that not only support the latest technologies but are also unmatched in performance, power dissipation and area," said John Koeter, vice president of marketing for the Solutions Group at Synopsys."

By offering DesignWare Data Converter IP solutions that are silicon-proven in a wide range of customer designs across a variety of process technologies, Synopsys enables designers to easily embed the analog IP into their SoCs with less risk and quickly deliver differentiated products to the market."

The DesignWare Sigma-Delta ADCs, Current Steering DACs, Video DACs and General Purpose ADCs and DACs in the 40-nm process are expected to be available in Q1 2010. The DesignWare Data Converter IP solutions are currently available in leading foundries and advanced technology processes from 180-nm to 65-nm.