PLX to demo world’s first PCI Express Gen 3 switch

SUNNYVALE, USA: PLX Technology Inc., a leading global supplier of software-enriched silicon for the enterprise and consumer markets, has announced what is believed to be the world’s first working PCI Express (PCIe) Gen 3 silicon.

PLX will use this device to demonstrate PCIe Gen 3 capabilities to key partners this quarter. General availability of a complete portfolio of new PLX PCIe Gen 3 switch products will be offered later this year, all of which are developed on 40nm technology. Enterprise servers and storage products featuring PCIe Gen 3 will be available in the first half of 2011 and are considered crucial to the advancement of data centers that enable cloud computing.

PLX is now shipping one million units of PCIe products per quarter from its industry-leading ExpressLane family. With more than 65 percent share of the PCIe switch market, PLX to date has delivered almost 6 million switch and bridge units, including more than 20 million PCIe ports, to board and system designers worldwide.

In a difficult economic environment, PLX had record revenue and unit shipments last quarter for PCI Express as it continues to see more customer designs move into production.

PLX expects its new PCIe Gen 3 switch family, which will be in full production later this year, to be the first switches in the industry fully compliant with the upcoming release of the PCI Special Interest Groups (PCI-SIG) PCIe Gen 3 protocol featuring signaling speeds of 8GT/s.

With advanced SerDes Decision Feedback Equalization (DFE) capabilities, PLX’s new line of PCIe Gen 3 switches will allow significant reach and legacy operation for many backplanes in service today. PLX SerDes DFE capabilities enable use of PCIe Gen 3 in server and storage backplanes, high-speed cable connections to I/O subsystems, and linking high-performance computer clusters to support power efficient cloud computing.

The devices offer PLX’s proprietary visionPAK debug software, which allows, for example, internal receive-eye observation after equalization and access to the devices’ internal debug registers enabling faster time to market.