ST. PAUL & ARMONK, USA: 3M and IBM announced that the two companies plan to jointly develop the first adhesives that can be used to package semiconductors into densely stacked silicon "towers." The companies are aiming to create a new class of materials, which will make it possible to build, for the first time, commercial microprocessors composed of layers of up to 100 separate chips.
Such stacking would allow for dramatically higher levels of integration for information technology and consumer electronics applications. Processors could be tightly packed with memory and networking, for example, into a "brick" of silicon that would create a computer chip 1,000 times faster than today's fastest microprocessor enabling more powerful smartphones, tablets, computers and gaming devices.
The companies' work can potentially leapfrog today's current attempts at stacking chips vertically – known as 3D packaging. The joint research tackles some of the thorniest technical issues underlying the industry's move to true 3D chip forms. For example, new types of adhesives are needed that can efficiently conduct heat through a densely packed stack of chips and away from heat-sensitive components such as logic circuits.
"Today's chips, including those containing '3D' transistors, are in fact 2D chips that are still very flat structures," said Bernard Meyerson, VP of Research, IBM. "Our scientists are aiming to develop materials that will allow us to package tremendous amounts of computing power into a new form factor – a silicon 'skyscraper.' We believe we can advance the state-of-art in packaging, and create a new class of semiconductors that offer more speed and capabilities while they keep power usage low -- key requirements for many manufacturers, especially for makers of tablets and smartphones."
Wednesday, September 7, 2011
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