GRENOBLE, FRANCE & SHIN-YOKOHAMA, JAPAN: Docea Power , Docea Power , the design-for-low-power company that delivers software solutions for power and thermal analysis at the architectural level, announced that the company has signed an agreement with HD Lab Inc. to distribute Docea Power solutions in Japan.
Through this agreement, HD Lab will provide support to the Electronic System Level (ESL) community in Japan with Docea Power solutions for power consumption optimization at the architectural level.
HD Lab is a professional solutions provider for large scale, system-level ICs. It has been an active player in promoting ESL methodologies in Japan since the introduction of SystemC.
Docea Power’s Aceplorer, a system-level tool, models and optimizes the power and thermal behavior of whole electronics systems (including Intellectual Property (IP), Systems-on-Chips (SoCs), and boards) at the architectural level. It uses a consistent power data management methodology for capturing and simulating power behavior.
“Japan is an important region for Docea Power with its growing adoption of ESL methodologies for designs where power consumption is a key differentiator, and where the complexity of both the architecture and use case scenarios drives the need for new EDA solutions,” commented Ghislain Kaiser, Docea Power CEO. “With its deep knowledge of the ESL architects community, HD Lab will be a key partner for expanding our market presence in Japan.”
“Our support for Docea Power solutions opens new and exciting opportunities for our consulting and EDA business lines,” stated Yoshifumi Nagano, GM, HD Lab. “In today’s complex designs, power consumption must be taken care of at the earliest stage of design, which is at the architectural level. Docea Power offers both the methodology and tools to explore and optimize a design’s architecture for low power.”