Virage Logic intros new product for post silicon bring up and system debug

FREMONT, USA: Virage Logic Corp. has added a new member, STAR (self test and repair) Silicon Browser, to its flagship STAR Memory System product family. The STAR Silicon Browser is a powerful solution to increase the efficiency of post silicon bring up, system debug and embedded memory characterization.

STAR Silicon Browser provides STAR Memory System users with direct access and interactive communication with the internal circuitry of their System-on-Chip (SoC) memory system, whether it is an internally developed or third-party memory, so they can debug and diagnose system issues more quickly during the chip bring-up process. This enables the system engineer to accelerate system bring-up which is very difficult to accomplish using production ATE equipment.

Among its unique capabilities, STAR Silicon Browser provides the ability to extract embedded memory contents, to perform multi-corner characterization, and to assess reliability and temperature dependencies.

It also allows a user to classify and correlate defects, analyze redundancy utilization and to precisely localize physical failures by zooming into the physical structure and locations of memory instances based on retrieved memory failures, as opposed to simply reporting the logical address of failed cells. As a result, design and test engineers can dramatically simplify the chip bring-up process.

In addition to accelerating the process, STAR Silicon Browser also gives engineers the freedom to set up the test at their desktop without the need for pre-defined patterns, facilitating full device debug and memory characterization without utilizing expensive automatic test equipment.

“Since the introduction of the STAR Memory System in 2001, Virage Logic has been providing industry leading embedded memory test, diagnosis and repair solutions that help IDMs, fabless houses and foundries accelerate their ramp to volume production,” said Dr. Yervant Zorian, vice president and chief scientist at Virage Logic.

“With the addition of the new STAR Silicon Browser, users have access to a comprehensive end-to-end solution for the entire SoC realization process from initial design planning all the way through post silicon bring up and volume manufacturing.”

Virage Logic’s STAR Memory System
The STAR Memory System provides the most effective solution for embedding on-chip test and repair of memories in designs with a few to a few-thousand memory instances.

The STAR Memory System’s open memory interface gives SoC designers the freedom to use the system’s capabilities with their choice of Virage Logic memories, other commercially available memories or internally developed memories to address a broad range of SoC design requirements.

The STAR Memory System provides a complete solution allowing users to select and automatically integrate and verify all of the embedded test and repair components required within the system. Silicon and yield proven in hundreds of designs on a variety of process nodes ranging from 180nm to 40nm, the STAR Memory System provides the most complete test solution to improve test quality including a comprehensive database for rapid diagnostics and repair of manufacturing faults found in advanced processes, and automated integration into design.

In order to provide STAR Memory System access to all memory developers, Virage Logic provides a proprietary memory description language called MASIS. The MASIS language, together with a MASIS compiler, simplifies and accelerates the process of creating and verifying memory views for the STAR Memory System.

STAR Yield Accelerator addresses the requirement to rapidly, cost effectively and accurately identify, analyze, isolate and classify memory faults as designs are readied for transition from first silicon to volume manufacturing.

Leveraging the STAR Memory System’s database, the STAR Yield Accelerator automatically generates vectors for test equipment and provides fault analysis and root-cause failure guidance based on silicon test results. Using STAR Yield Accelerator, test and product engineers can rapidly analyze failures manifested in embedded memories and inspect the physical location and class of each fault to determine the root cause without involving the IP vendor or SoC designer.

Working in concert to provide a complete RTL to test floor embedded memory test and repair solution, the STAR Memory System is proven to reduce tapeout schedules for new complex SoCs by weeks and the STAR Yield Accelerator can reduce silicon bring-up by months, reducing overall time-to-volume production.

Virage Logic’s STAR Silicon Browser will be available for volume shipment in January 2010.