VinChip announces India's first homegrown 32-bit processor

CHENNAI, INDIA: VinChip Systems has announced the immediate availability of its convergent 32-bit RISC processor, VinRZ5110. Its DSP enhanced instruction set architecture, low power design and optimized gate count makes it well suited for DSP and other embedded applications.

Products based on applications such as mass storage devices, automotive control, wireless devices, audio/video encoders and decoders can be brought to market on schedule using VinRZ5110 and its impressive array of development tools. It is also suitable for FPGA-based embedded systems, making it highly appropriate for bleeding/leading edge technology range of products.

VinRZ5110 processor core includes on-chip debug logic based on OpenOCD which also supports in-system programming via JTAG. As an optional module, VinSMDP (VinChip's System Memory Debug Probe) is capable of static and dynamic capture of debug data and in-system programming over USB 2.0 achieving speeds of 480 Mbps.

It gives 100 percent visibility and controllability to the entire system memory range and speeds up the remote debugging cycle appreciably compared to existing JTAG based debug solutions. VinSMDP can multi-task as a USB device for user tasks on the AHB as well.

VinRZ5110 has been ported to binutils 2.19, gcc 4.3.2, gdb 6.8 and Eclipse IDE. Support for virtual prototyping has been made possible by Imperas' Open Virtual platform (OVP) featuring OVPsim simulator. The Instruction Set Simulator (ISS) built using OVPsim simulates at very high speeds and enables development of embedded
software much ahead in the product cycle.

An OCP interface has been provided for easy stitching of IP blocks and makes it independent of specific bus protocols and design implementations.

"VinChip's latest offering, the VinRZ5110 RISC processor, addresses customer requirements not only with the processor architecture but also with the comprehensive set of tools available. These tools include providing the instruction set simulator using Open Virtual Platforms modeling technology, so that virtual platforms based on the VinRZ5110 can be built using both OVP and SystemC/TLM-2.0 simulators", says Simon Davidmann, OVP founder and Imperas CEO.