Verigy's yield learning solution helps semicon manufacturers maximize entitlement yield

CUPERTINO, USA: Verigy, a premier semiconductor test company, introduced its Yield Learning Solution, a comprehensive solution that integrates on-tester, real-time capture and statistical analysis of electrical failures on complex system-on-chip (SOC) die.

The Yield Learning Solution will be showcased at the SEMICON West trade show in Verigy's Booth #921, South Hall, July 14 to 16, 2009 at the Moscone Convention Center in San Francisco.

The Verigy Yield Learning Solution offers a unique combination of pre-analysis modules on the Verigy V93000 SOC test platform with a design-centric analysis and visualization toolset. This makes it possible for manufacturers to efficiently triage large quantities of electrical failures into specific logical faults.

By seamlessly linking electrical test with physical layout data it allows fast localization of the root cause physical defects. Verigy's Yield Learning Solution enables users to more efficiently identify both visible and non-visible yield loss mechanisms, accelerating time-to-production by more than four weeks and increasing entitlement yield by up t0 six percent.

Diagnosing problems in nanometer level device design and manufacture is becoming more challenging which makes closing the loop between design, fab, and test essential. Verigy's Yield Learning Solution efficiently links test back into both design and the fab, providing logic bitmaps for both stuck-at and difficult to detect timing faults in scan chains and logic.

The Yield Learning Solution provides both the high accuracy required for the lab and the high throughput needed for production – critical for both new product introduction and ongoing manufacturing monitoring.

"Because of the tremendous investment in resources associated with designing at 45nm and below, our customers need a solution that enables them to collaborate with their foundry, whether in-house or outsourced, to quickly diagnose their defects using secure IP-protected information," said Larry Dibattista, General Manager, DfX Solutions, Verigy.

"Verigy's Yield Learning Solution not only facilitates this efficient collaboration, but also characterizes these design problems, providing semiconductor manufacturers with a unique capability to respond to and correct yield excursions in real-time which in turn accelerates time-to-market."

Best-in-class integrated solution
Verigy's Yield Learning Solution consists of the V93000 scalable architecture, Triage Fault Locator and YieldVision software toolsets, the most advanced on-tester and software tools for failure data capture and yield analysis.

The unique, scalable architecture of the V93000 allows for complete integration with the Yield Learning Solution. Triage software's proprietary algorithms enables unprecedented data processing efficiency and the YieldVision analysis and visualization tools dramatically reduce the time required to diagnose problems by localizing the root cause physical defect. The result is significantly faster time to problem diagnosis and resolution.