BANGALORE, INDIA: Technology on Tour, the annual conference from Cadence Design Systems, Inc. that showcases the company’s latest technology offerings, will be held in four Indian cities: Bangalore, New Delhi, Hyderabad, and Pune from Wednesday, May 6 through Friday, May 29, 2009.
These conferences provide India’s growing semiconductor industry with valuable insights into the new technologies that enhance and enable electronic design. Attending design engineers will have an opportunity to interact with Cadence technology experts and other industry professionals, gaining new perspectives on today’s electronic design challenges.
These include designing high-performance, low-power chips; increasing design predictability, productivity and reliability; high-level synthesis solutions for design and verification; addressing challenges in mixed-signal design and implementation; and trends and solutions in PCB interconnect design. The venues and dates ate given below:
Bangalore: May 6, 2009
New Delhi (Noida): May 12, 2009
Hyderabad: May 14, 2009
Pune: May 29, 2009
Thursday, May 7, 2009
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