SAN JOSE & MOUNTAIN VIEW, USA: CriticalBlue, a pioneer in embedded multicore software analysis, exploration and verification tools, and Cavium Networks Inc., a provider of semiconductor products that enable intelligent processing for networking, communications and the digital home, announced immediate support for the OCTEON and OCTEON II architectures within CriticalBlue's Prism software analysis, exploration and verification product. Prism can now be used by software developers building applications on multicore OCTEON and OCTEON II processors.
Going beyond purely mapping software to multicore hardware, with this release users are able to quantify the benefit of software migration to the dual issue superscalar OCTEON and OCTEON II families. Users are able to analyze data cache misses and pipeline stalls on a thread, function or source line level, resulting in an ability to see the impact of such cache misses on the overall concurrent schedule.
All of this can be done on an existing unmodified software application running on a single core model or development board. Beyond that, experienced multicore software programmers will benefit from Prism's capabilities in the area of performance tuning and multicore software verification.
Prism is an award winning Eclipse-based embedded multicore programming system which allows software engineers to easily assess and realize the full potential of multicore processors without significant changes to their development flow.
Prism analyzes the behavior of code running on hardware development boards, virtual machines or simulators. It allows engineers to take their existing sequential code, and before making any changes, explore and analyze opportunities for concurrency. Having identified the optimal parallelization strategies in this way, developers implement parallel structures, and use Prism again to verify performance efficiency and thread-safe operations.
Cavium Networks' OCTEON family of Multi-Core MIPS64 processors is the industry's most scalable, highest-performance, and lowest-power solution for intelligent networking applications ranging from 100Mbps to 40Gbps.
These software-compatible processors, with one to thirty-two cnMIPS cores on a single chip, integrate next-generation networking I/Os along with the most advanced security, storage, and application hardware acceleration, offering unprecedented throughput and programmability for the Layer 2 through Layer 7 processing requirements of intelligent networks.
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