Saturday, June 5, 2010

GateRocket adds Xilinx Virtex-6 support to industry-leading FPGA verification and debug solution

BEDFORD, USA: GateRocket Inc., a leading supplier of verification and debug solutions for advanced FPGAs, recently announced new versions of its popular RocketDrive product that incorporate FPGAs from the Xilinx Virtex-6 family of high performance programmable devices and significantly reduce the verification and debug time associated with these leading-edge devices.

The Virtex-6 FPGAs are the highest performing and most advanced FPGAs available, allowing true system-on-chip (SoC) level integration that is well-suited to the needs of a wide range of electronic products.

GateRocket's RocketDrive cuts verification and lab debug time in half versus traditional FPGA design approaches. This is accomplished by integrating the FPGA into the HDL simulator to provide a "hardware in the loop" process based on GateRocket's proprietary Device Native methodology.

This technique allows execution of the design on the target FPGA device. By combining the actual FPGA hardware and RTL simulation models in the same verification run, this solution reduces verification and lab debugging time significantly.

"Our flagship Virtex-6 FPGA family and the GateRocket verification and debug solutions have improved the development efficiency and design bring-up time for some of our most advanced customers," said Dave Tokic, senior director for partner ecosystems and alliances at Xilinx. "We're pleased that Xilinx Alliance Program members like GateRocket are keeping pace with our technology advancements to deliver unique solutions that reduce design time for our customers."

Multiple configurations optimized for different user needs
The new Virtex-6 RocketDrives use the largest LX and SX devices for advanced logic and DSP applications respectively. GateRocket also offers a cost effective mid-range device configuration targeted at users who do not require the largest FPGA device in the family.

By using devices optimized for specific needs, GateRocket can pass along the cost savings for an even greater return on investment. Each RocketDrive configuration offers the same enhanced verification performance and debug efficiency, and maintains complete compatibility with popular EDA logic simulators from Cadence, Mentor and Synopsys.

Advanced debugging with RocketVision for Virtex-6 devices
The GateRocket solution allows designers using Virtex-6 devices to move effortlessly between RTL and the specific FPGA being targeted, combining actual FPGA hardware and RTL simulation models together in a single verification run, without changes in the design flow or methodology.

This technique, called soft patch, provides engineers with the ability to make a change to one or more RTL blocks and re-run them along with the hardware implementations of the other blocks, thereby avoiding the need to rebuild the device for each fix and enabling multiple design-change-debug iterations in a single day. The net result is a time savings of up to 50 percent or more over traditional verification and debug approaches.

Dave Orecchio, president and CEO of GateRocket, said: "As the FPGA industry continues to push the performance and capacity of its devices at every process node, the verification and debug challenges faced by designers also increase in lock-step. GateRocket is committed to providing verification and debugging solutions that allow Xilinx customers to more efficiently leverage the capabilities of the most sophisticated devices by addressing FPGA complexity and delivering a significant boost in productivity."

GateRocket offers support for the Xilinx Virtex-6 FPGA family with several RocketDrive configurations supporting both the LX and SX families of devices. Pricing starts at $25,000 with availability in July 2010.

No comments:

Post a Comment

Note: Only a member of this blog may post a comment.