Open-Silicon promotes Taher Madraswala to VP of Engineering

MILPITAS, USA: Open-Silicon, Inc., a leading ASIC design and semiconductor manufacturing company, announced the promotion of Taher Madraswala to Vice President of Engineering. He will continue driving the on-time execution of customers' SoC and ASIC design and development programs.

Madraswala joined Open-Silicon at its inception in 2003 and served as director of ASIC Program Management where he was instrumental in building the company's business model, OpenMODEL, and particularly Open-Silicon's unique model for ASIC Program Management.

His career accomplishments include more than 22 years of semiconductor engineering experience – 12 of which were devoted to designing microprocessors for Intel Corp. To date, Taher Madraswala has the distinction of being part of more than 150 tapeouts throughout his career. His focus has been on taking an architecture spec to gds2 and he has extensive experience in micro-architecture design, custom circuit design, RTL and physical design, and test among other parts of the design process.

As VP of Engineering, Madraswala will continue to report to Dr. Naveed Sherwani, President and Chief Executive Officer. He will be responsible for the development of strategic planning, managing the design engineering teams, and for overseeing the implementation of Open-Silicon's proven design methodologies.

"Taher's expertise in handling complex designs and managing Open-Silicon's design methodology has been key to our success in providing customers with consistent delivery of reliable silicon," said Dr. Sherwani. "His extensive experience in hands-on design and his leadership skills will be an asset in leading our design engineering teams today and as we move forward."

Madraswala earned a Master's degree in Computer Engineering for the University of Louisiana, Lafayette, and an undergraduate degree in Electrical Engineering from Aligarh University.