Concept Engineering enhances automatic transistor-level schematic generation technology

DAC 2010, FREIBURG, GERMANY: With more analog building blocks being integrated into modern mixed-signal systems-on-chip (SoCs) and with parasitic effects getting more complex with each process node, there is clear and increasing need for improved mixed-mode, analog, and parasitic network visualization capabilities.

Recognizing this need, Concept Engineering has significantly improved analog and mixed-signal (A/MS) visualization capabilities for T-engine, the company’s core technology for automatic transistor-level schematic generation. The enhanced T-engine automatically draws easy-to-read and easy-to-understand schematics for both A/MS and digital circuits.

T-engine creates schematic drawings or schematic fragment drawings for device-level information as usually defined in SPICE netlists and SPICE model descriptions. Working at the device level, design engineers get very detailed visual feedback about the problems they have to solve and can more easily optimize their designs, intellectual property (IP) blocks or library cells for low power, yield, or signal integrity.

T-Engine is integrated into Concept’s SpiceVision PRO, the company’s transistor-level debugging tool. Designers of electronic integrated circuits (ICs) and SoCs use SpiceVision PRO to visualize critical information such as circuit structure, device interaction and parasitic elements, at the transistor level, so that they can more easily and accurately understand and tune designs for maximum performance, lower power consumption or reliability.

Original equipment manufacturer (OEM) customers use T-engine to quickly realize debugging cockpits for their electronic design automation (EDA) tools at a very competitive cost and with very high quality. T-engine’s easy customization gives OEMs a high-performance, high-capacity graphical user interface (GUI) that fits into customers’ applications while allowing the OEM to concentrate on product core features.

“Concept Engineering has a long history of providing its OEM customers with leading visualization technology for all design levels, including system-level, RTL-level, gate-level and transistor-level,” said Gerhard Angst, CEO and president of Concept Engineering. “With the addition of enhanced analog and mixed-signal visualization, we are bringing even more visibility into problems that designers face today.”