SAN JOSE, USA: Arasan Chip Systems Inc. has added an ONFI 3.0 PHY to its Flash Storage solution. Arasan's existingONFI 3.0 NAND Flash Controller with patent pending dynamically configurable ECC technologyseamlessly integrates with the new PHY to form an easy to use, high-performance Flash Storage solution.
As the NAND Flash landscape is changing, Arasan NAND Flash Controller IP Core ischanging with it. The increasing demand for NAND flash with higher data transfer rates and better data integrity has led to the creation of the ONFI 3.0 NAND flash specification supporting 400MT/sec.
Compliant to the ONFI 3.0 electrical interface, Arasan's ONFI 3.0 PHY, isdesigned to be delivered as a GDS II hard macro,and is process technology proven and easy to integrate. This ONFI 3.0 PHY, supporting NV-DDR2 up to 400MT/s with capability of scaling speed, accelerates time-to-market by reducing SoC designers' development time otherwise spent on ensuring high speed signal integrity.
Many memory subsystem digital designers have experienced tremendous challenges with ever increasing data transfer rates and differential signaling. Robust memory subsystem bus design with very high signal integrity and low noise ratio usually requires dedicated and experienced analog circuit designers. By using Arasan's solution, SoC designers can now confidently and easily integrate the ONFI 3.0 PHY into their SoC's with high success rate of first-time working silicon with high ONFI 3.0 data rates.
Focusing on high performance and high reliability, Arasan's previously announced ONFI 3.0 NAND Flash Controller IPis designed with Arasan's patent pending ECC engine with dynamically configurable code-length Bose-Chaudhuri-Hocquenghem (BCH) coders and decoders for high performance and high data rate error corrections. The patent pending configurable code-length BCH coders and decoders perform the Inversion-less Berlekamp-Massey Algorithm (IBMA) to generate or decode ECC codes on each clock.
With Arasan's innovative code-length configurability, from 1-bit to 32-bits, the BCH coders and decoders can match the target NAND flash error correction requirements; the number of clocks required togenerate or decode ECC codes are greatly reduced, thus increasing system performance. In addition, configurable code-length matching for the target NAND ECC requirement (for example 24-bit ECC) eliminates unnecessary waste of ECC code storage area (i.e. NAND spare area) when compared to using a fixed-code-length ECC engine. With the short code-length in this example, Arasan's NAND Flash Controller provides the flexibility to use NAND flash with smaller spare area, or to free up the spare area for other purpose.
"We are very pleased to continue adding toour PHY and patent portfolio as a result of our commitment to invest in a Total IP Solution approach", said Andrew Haines, senior director of Worldwide Marketing. "With our deep domain knowledge in interface standards accumulated in the past 15 years and with inputs from more than 300 global customers, wehave invested indeveloping total IP solutions which include digital IP, PHY, verification IP, software stack, hardware development platform (HDP), electronic system level verification (ESL), and engineering support, for easy and seamless SoC integration. The ONFI 3.0 PHY and the dynamically configurable ECC technology make the adoption of latest ONFI 3.0 standard significantly easier for SoC engineers."
Arasan's ONFI 3.0 NAND Flash Controller IP supports SLC and MLC NAND up to 128Gb NAND flash, synchronous and asynchronous NAND interfaces, page size of 512B, 2KB, 4KB, and 8KB, BCH error correction up to 64-bit ECC, and eight chip-selects.
Arasan's ONFI 3.0 PHY is available immediately for licensing in including GDS II, IP core, Verification IP, and documentation. It is also available with AMBA3-AXI bus, or alternative buses such as AHB/OCP bus. Optionally, a NAND Flash File system (FFS) is also available to support advanced features such as flash memory read/write, garbage collection, bad block management, wear leveling, and other background functions.
Friday, September 30, 2011
Tamar Technology ships its first fully automated WaferScan system
NEWBURY PARK, USA: Tamar Technology, a precision metrology company specializing in metrology systems for the semiconductor, hard disk drive and medical device industries, shipped its first fully automated WaferScan system to a major semiconductor fab. The systems addresses metrology requirements for Through Silicon Via (TSV) etch depth, deep trench depth, wafer thickness, photo-resist thickness and hole diameter.
The system includes Tamar's proprietary Wafer Thickness Sensor (WTS) to measure the depth of TSVs and deep narrow trenches. The system also includes Tamar’s proprietary Visible Thickness Sensor (VTS) to measure thickness of photo resist, thick films and various polymers. Integrated with Tamar’s sensor is a video microscope for automated alignment and vision measurements, such as hole diameter.
"Tamar's WTS can measure etch depth and wafer thickness of single or bonded wafers. The measurement is optical and non-destructive and it is the only technology that can measure any TSV or trench regardless of the diameter or depth," says David Grant, president of Tamar Technology. "One of the challenges that Tamar’s sensors were able to overcome was the large range of etch measurements required, which can be hundreds of microns deep and as thin as one micron wide.”
Tamar's VTS measures the thickness of films and polymers on the surface and at the bottom of etched features to ensure the presence of material and to monitor the thickness variation across the wafer.
This system is flexible and can be configured with multiple sensors to accommodate different measurement requirements. “The combination of a microscope with the different sensors allows machine vision alignment producing the accurate positioning required for these precision applications," says Grant. “It runs fully automated using programmed recipes and communicates with the factory host via SECS/GEM." Grant adds, “Installation of this tool indicates how well our technology has been accepted and validates our efforts in advancing to fully automated, clean room class 1 semiconductor tools."
The Tamar system is used in production to monitor various processes and helps to reduce costs. Because of its non-destructive nature, product yields are improved as process excursions are monitored in near real time.
The system includes Tamar's proprietary Wafer Thickness Sensor (WTS) to measure the depth of TSVs and deep narrow trenches. The system also includes Tamar’s proprietary Visible Thickness Sensor (VTS) to measure thickness of photo resist, thick films and various polymers. Integrated with Tamar’s sensor is a video microscope for automated alignment and vision measurements, such as hole diameter.
"Tamar's WTS can measure etch depth and wafer thickness of single or bonded wafers. The measurement is optical and non-destructive and it is the only technology that can measure any TSV or trench regardless of the diameter or depth," says David Grant, president of Tamar Technology. "One of the challenges that Tamar’s sensors were able to overcome was the large range of etch measurements required, which can be hundreds of microns deep and as thin as one micron wide.”
Tamar's VTS measures the thickness of films and polymers on the surface and at the bottom of etched features to ensure the presence of material and to monitor the thickness variation across the wafer.
This system is flexible and can be configured with multiple sensors to accommodate different measurement requirements. “The combination of a microscope with the different sensors allows machine vision alignment producing the accurate positioning required for these precision applications," says Grant. “It runs fully automated using programmed recipes and communicates with the factory host via SECS/GEM." Grant adds, “Installation of this tool indicates how well our technology has been accepted and validates our efforts in advancing to fully automated, clean room class 1 semiconductor tools."
The Tamar system is used in production to monitor various processes and helps to reduce costs. Because of its non-destructive nature, product yields are improved as process excursions are monitored in near real time.
Toshiba and Amkor sign MoU for acquisition of Toshiba’s Malaysian semiconductor assembly and test operations
TOKYO, JAPAN & CHANDLER, USA: Toshiba Corp. and Amkor Technology Inc. have signed a non-binding memorandum of understanding for the acquisition by Amkor of Toshiba Electronics Malaysia Sdn. Bhd. (TEM), Toshiba’s semiconductor assembly operation in Malaysia, together with a license to Amkor for certain related intellectual property rights.
Subject to the satisfactory conclusion of due diligence, negotiation and signing of definitive agreements and receipt of any necessary government approvals, Toshiba and Amkor expect to complete the transaction by early January 2012.
Established in 1973, TEM has steadily expanded the scale of its assembly operations, primarily of discrete and analog semiconductors. In recent years, its main product has been power semiconductors.
Toshiba positions power semiconductors as a driver of growth for its semiconductor business and seeks to maximize cost competitiveness across its front- and back-end operations. Transferring ownership of TEM to the Amkor group will allow TEM to take full advantage of Amkor’s large scale production and material procurement capabilities and boost the overall efficiency of its power semiconductor operations.
Toshiba will continue to subcontract power semiconductor assembly and test to TEM as an important source of key products. As it does so, Toshiba will shift its focus and resources to front-end wafer fabrication for power semiconductors by reinforcing production capabilities at Kaga Toshiba Electronics Corporation, Toshiba Group’s discrete semiconductor production base in Japan’s Ishikawa Prefecture.
Amkor expects the transaction to further strengthen its relationship with Toshiba and to grow its semiconductor assembly and testing business. In particular, Amkor believes that TEM will provide an excellent platform for increasing its presence in the power discrete market, where Amkor estimates there is unmet customer demand for outsourced assembly and test services.
Subject to the satisfactory conclusion of due diligence, negotiation and signing of definitive agreements and receipt of any necessary government approvals, Toshiba and Amkor expect to complete the transaction by early January 2012.
Established in 1973, TEM has steadily expanded the scale of its assembly operations, primarily of discrete and analog semiconductors. In recent years, its main product has been power semiconductors.
Toshiba positions power semiconductors as a driver of growth for its semiconductor business and seeks to maximize cost competitiveness across its front- and back-end operations. Transferring ownership of TEM to the Amkor group will allow TEM to take full advantage of Amkor’s large scale production and material procurement capabilities and boost the overall efficiency of its power semiconductor operations.
Toshiba will continue to subcontract power semiconductor assembly and test to TEM as an important source of key products. As it does so, Toshiba will shift its focus and resources to front-end wafer fabrication for power semiconductors by reinforcing production capabilities at Kaga Toshiba Electronics Corporation, Toshiba Group’s discrete semiconductor production base in Japan’s Ishikawa Prefecture.
Amkor expects the transaction to further strengthen its relationship with Toshiba and to grow its semiconductor assembly and testing business. In particular, Amkor believes that TEM will provide an excellent platform for increasing its presence in the power discrete market, where Amkor estimates there is unmet customer demand for outsourced assembly and test services.
Broadcom market exit shows dramatic decline of western TV chip suppliers
EL SEGUNDO, USA: Broadcom Corp.’s reported exit from the markets for television video processing chips illustrates the increasingly intense state of competition in this area, as Asian suppliers drive the established Western suppliers out of the business, according to the IHS iSuppli Digital TV & Set-top Box Semiconductor Market Tracker.
A recent press report noted that US-based Broadcom plans to shut down its internal business unit focused on system on chip (SoC) solutions for TVs and Blu-ray disc players. This development was followed by news that another US supplier to this market, Trident Microsystems Inc., is engaging in a 20 percent reduction of its workforce to adjust to declining sales in the set-top box and television semiconductor segments.
“With growth in the consumer electronics (CE) market slowing in mature Western economies and soaring in Asia, the balance of power in the television video processor industry is shifting eastward,” said Randy Lawson, principal analyst, display & consumer electronics, for IHS. “This has led to the rise of Asian CE system and semiconductor suppliers at the expense of the established US players. Given Broadcom’s strong product and technology offerings, the company’s apparent exit from the market serves as a dramatic example of how forbidding the competitive landscape has become in television video processing semiconductors and in CE chips in general.”
Taiwan in the lead
Just five years ago, Trident, Micronas of Europe, ATI Technologies Inc. of Canada and Genesis Semiconductor Inc. of the United States were the top four suppliers of TV video processors, boasting a combined share of 58 percent of the total market. In the first quarter of 2011, Taiwan’s Mstar Semiconductor Inc. and MediaTek Inc. owned the top two slots in the television video processor market, with a combined 45.3 percent share. Of the Top 4 suppliers in 2006, only Trident remains, with a mere 7.3 percent share in early 2011—even after absorbing both Micronas and NXP’s television semiconductor business during the intervening years.
Taiwanese suppliers have benefited from increasing cost pressure in the low end of the television market, while Western suppliers have suffered from competition with captive consumer electronics semiconductor makers.
“In the market for inexpensive television sets, there is enormous demand for the lowest-cost semiconductor solutions—the type offered by Taiwanese suppliers,” Lawson said. “In the high-end television market, leading Korean and Japanese brands—including Samsung, Toshiba, Sony and Panasonic—frequently employ their own internally designed semiconductor solutions. This leaves little opportunity for the Western suppliers that offer video processors targeted at the midrange and high end of the market.”
Too smart by half
Significantly, Broadcom’s apparent exit from the television processor market comes at a time when the types of solutions the company offers should be in high demand.
“Smart TVs that integrate Internet capability are all the rage in the television market,” Lawson observed. “This should play right into Broadcom’s strength in offering advanced television SoC solutions with built in connectivity. However, with the television processor market experiencing a squeeze at both the high and low ends, even a player as strong as Broadcom is finding it hard to compete successfully.”
West is not the best in TV chip market
The reports on both Broadcom and Trident point to a pessimistic near-term outlook for the television semiconductor market. In particular, the consumer electronics and television businesses in Western regions are suffering from too much inventory and reduced end-market demand.
As the Western economies continue to suffer slumping consumer demand and macroeconomic woes, IHS expects to see even further consolidation of suppliers in the television processor space. There also will be a trend toward the adoption of video processing intellectual property into application processors targeting new forms of mobile CE devices, such as media tablets.
Source: IHS iSuppli, USA.
A recent press report noted that US-based Broadcom plans to shut down its internal business unit focused on system on chip (SoC) solutions for TVs and Blu-ray disc players. This development was followed by news that another US supplier to this market, Trident Microsystems Inc., is engaging in a 20 percent reduction of its workforce to adjust to declining sales in the set-top box and television semiconductor segments.
“With growth in the consumer electronics (CE) market slowing in mature Western economies and soaring in Asia, the balance of power in the television video processor industry is shifting eastward,” said Randy Lawson, principal analyst, display & consumer electronics, for IHS. “This has led to the rise of Asian CE system and semiconductor suppliers at the expense of the established US players. Given Broadcom’s strong product and technology offerings, the company’s apparent exit from the market serves as a dramatic example of how forbidding the competitive landscape has become in television video processing semiconductors and in CE chips in general.”
Taiwan in the lead
Just five years ago, Trident, Micronas of Europe, ATI Technologies Inc. of Canada and Genesis Semiconductor Inc. of the United States were the top four suppliers of TV video processors, boasting a combined share of 58 percent of the total market. In the first quarter of 2011, Taiwan’s Mstar Semiconductor Inc. and MediaTek Inc. owned the top two slots in the television video processor market, with a combined 45.3 percent share. Of the Top 4 suppliers in 2006, only Trident remains, with a mere 7.3 percent share in early 2011—even after absorbing both Micronas and NXP’s television semiconductor business during the intervening years.
Taiwanese suppliers have benefited from increasing cost pressure in the low end of the television market, while Western suppliers have suffered from competition with captive consumer electronics semiconductor makers.
“In the market for inexpensive television sets, there is enormous demand for the lowest-cost semiconductor solutions—the type offered by Taiwanese suppliers,” Lawson said. “In the high-end television market, leading Korean and Japanese brands—including Samsung, Toshiba, Sony and Panasonic—frequently employ their own internally designed semiconductor solutions. This leaves little opportunity for the Western suppliers that offer video processors targeted at the midrange and high end of the market.”
Too smart by half
Significantly, Broadcom’s apparent exit from the television processor market comes at a time when the types of solutions the company offers should be in high demand.
“Smart TVs that integrate Internet capability are all the rage in the television market,” Lawson observed. “This should play right into Broadcom’s strength in offering advanced television SoC solutions with built in connectivity. However, with the television processor market experiencing a squeeze at both the high and low ends, even a player as strong as Broadcom is finding it hard to compete successfully.”
West is not the best in TV chip market
The reports on both Broadcom and Trident point to a pessimistic near-term outlook for the television semiconductor market. In particular, the consumer electronics and television businesses in Western regions are suffering from too much inventory and reduced end-market demand.
As the Western economies continue to suffer slumping consumer demand and macroeconomic woes, IHS expects to see even further consolidation of suppliers in the television processor space. There also will be a trend toward the adoption of video processing intellectual property into application processors targeting new forms of mobile CE devices, such as media tablets.
Source: IHS iSuppli, USA.
Xilinx releases Pocket Power Estimator app for iPhone
SAN JOSE, USA: Designers who rely on their iPhones as much as their PCs now have a quick and easy way to determine the power consumption of Xilinx’s 28nm 7 series FPGA. The new Pocket Power Estimator (PPE) application for Apple’s iPhone enables designers to see how Xilinx’s 28nm programmable platforms stack up to alternatives in delivering the lowest power consumption for their systems.
Designers can download the PPE from the Apple App Store today and, for the first time ever, quickly and easily explore what-if-scenarios and get immediate feedback on the estimated power consumption compared to alternatives. For more complex and detailed power analyses, designers can use the ISE Design Suite’s XPower Estimator (XPE) and the XPower Analyzer (XPA) tools.
“Manufacturers of electronic systems across all our market segments are eager to either lower their current power budgets or drive higher system performance within the same power budgets,” said Xilinx Distinguished Engineer and resident power ‘guru’ Matt Klein. “Offering the Power Pocket Estimator (PPE) on one of the most popular smartphone platforms puts power estimation in the hands of busy designers who routinely turn to their iPhone to access information, further enhancing their design productivity.”
The PPE app, which can also be used with the iPad, offers an easy-to-use GUI for the quick entering of resource requirements – such as SerDes utilization, DSP, memory, logic capacity and more. Compared to the previous generation 40nm FPGAs, Xilinx 7 series FPGAs deliver about 50 percent lower total power, on average, thanks in part to the HPL (high-performance/low-power) process technology offered by foundry partner TSMC.
Further components of the power envelope that drive this total power reduction include 65 percent lower maximum (worst case) static power, 25 percent lower dynamic power, 30 percent lower I/O power, and 60 percent lower transceiver power. The PPE app takes into account these aspects of total power consumption to enable designers to easily obtain a high-level estimate of power usage by functional block, and how it compares to other Xilinx or competing devices.
The PPE also includes application reference examples that designers can use as starting points to customize to their own specifications. The first release of the app includes design examples for the wired and wireless communications markets, while future releases will have additional market segment examples and support other smartphone platforms.
7 Series low power benefits
The 28 HPL process technology avoids many yield and leakage issues seen with the embedded SiGe process used in the 28nm HP process and delivers a more cost-effective process solution. The 7 series’ larger design headroom, resulting in greater voltage headroom enabled by the HPL process, allows the choice of operating voltages at a wider range of values and enables a flexible power/performance strategy. This enables Xilinx to offer the new low power -2L option for every 7 series device, providing mid-speed-grade performance at 45 percent lower static power compared to the commercial offering.
The same -2L device can also function at 0.9V core voltage to provide lower power benefit, including 55 percent lower static power and 20 percent lower dynamic power compared the equivalent commercial speed grade offering.
On the design tool side of power optimization, Xilinx introduced the first automated, fine-grained clock-gating solution for FPGAs that can reduce dynamic power by up to 30 percent. This automated capability links to the place and route portion of the standard FPGA design flow and uses a set of innovative algorithms to perform an analysis on all portions of the design to create fine-grain clock-gating or logic-gating signals that neutralize superfluous switching activity. The power benefit of the intelligent clock gating can easily be realized in the PPE app by using the power optimization option.
Furthermore, it is important to estimate the power consumption under worst-case conditions. The Xilinx PPE app is designed to provide the estimated total power under max conditions to provide a reasonable and realistic estimate for the respective design scenario.
The Xilinx PPE mobile application is free of charge and is available now on the Apple App Store. A version of PPE for Android and other Smartphone platforms will be introduced later this year.
Designers can download the PPE from the Apple App Store today and, for the first time ever, quickly and easily explore what-if-scenarios and get immediate feedback on the estimated power consumption compared to alternatives. For more complex and detailed power analyses, designers can use the ISE Design Suite’s XPower Estimator (XPE) and the XPower Analyzer (XPA) tools.
“Manufacturers of electronic systems across all our market segments are eager to either lower their current power budgets or drive higher system performance within the same power budgets,” said Xilinx Distinguished Engineer and resident power ‘guru’ Matt Klein. “Offering the Power Pocket Estimator (PPE) on one of the most popular smartphone platforms puts power estimation in the hands of busy designers who routinely turn to their iPhone to access information, further enhancing their design productivity.”
The PPE app, which can also be used with the iPad, offers an easy-to-use GUI for the quick entering of resource requirements – such as SerDes utilization, DSP, memory, logic capacity and more. Compared to the previous generation 40nm FPGAs, Xilinx 7 series FPGAs deliver about 50 percent lower total power, on average, thanks in part to the HPL (high-performance/low-power) process technology offered by foundry partner TSMC.
Further components of the power envelope that drive this total power reduction include 65 percent lower maximum (worst case) static power, 25 percent lower dynamic power, 30 percent lower I/O power, and 60 percent lower transceiver power. The PPE app takes into account these aspects of total power consumption to enable designers to easily obtain a high-level estimate of power usage by functional block, and how it compares to other Xilinx or competing devices.
The PPE also includes application reference examples that designers can use as starting points to customize to their own specifications. The first release of the app includes design examples for the wired and wireless communications markets, while future releases will have additional market segment examples and support other smartphone platforms.
7 Series low power benefits
The 28 HPL process technology avoids many yield and leakage issues seen with the embedded SiGe process used in the 28nm HP process and delivers a more cost-effective process solution. The 7 series’ larger design headroom, resulting in greater voltage headroom enabled by the HPL process, allows the choice of operating voltages at a wider range of values and enables a flexible power/performance strategy. This enables Xilinx to offer the new low power -2L option for every 7 series device, providing mid-speed-grade performance at 45 percent lower static power compared to the commercial offering.
The same -2L device can also function at 0.9V core voltage to provide lower power benefit, including 55 percent lower static power and 20 percent lower dynamic power compared the equivalent commercial speed grade offering.
On the design tool side of power optimization, Xilinx introduced the first automated, fine-grained clock-gating solution for FPGAs that can reduce dynamic power by up to 30 percent. This automated capability links to the place and route portion of the standard FPGA design flow and uses a set of innovative algorithms to perform an analysis on all portions of the design to create fine-grain clock-gating or logic-gating signals that neutralize superfluous switching activity. The power benefit of the intelligent clock gating can easily be realized in the PPE app by using the power optimization option.
Furthermore, it is important to estimate the power consumption under worst-case conditions. The Xilinx PPE app is designed to provide the estimated total power under max conditions to provide a reasonable and realistic estimate for the respective design scenario.
The Xilinx PPE mobile application is free of charge and is available now on the Apple App Store. A version of PPE for Android and other Smartphone platforms will be introduced later this year.
SPTS ships 600th AVP vertical thermal processing system
SAN JOSE, USA: SPTS Technologies, a leading manufacturer of etch, deposition, and thermal processing equipment for the semiconductor and related industries today announced the shipment of its 600th Advanced Vertical Processor (AVP) vertical batch thermal processing system to Cypress Semiconductor Corp.. The system will be used for Cypress's S8 technology platform, which supports Cypress's TrueTouch, PSoC 3, PSoC 5, CapSense and NVSRAM products.
Manufactured at SPTS' Thermal Products Division in San Jose, Calif., the AVP furnace is used for a diverse range of diffusion and low-pressure chemical vapor deposition (LPCVD) applications in the semiconductor, power management, MEMS and compound semiconductor markets. The division maintains development capability on the common wafer sizes for all these markets, from 100 to 300mm.
The AVP is available in a single or dual-boat configuration, providing flexibility and a low CoO solution for all process types. In-situ clean technology enables the AVP to run LPCVD processes for up to two years between quartz change, significantly improving the system uptime and maximizing productivity. Key processes include wafer annealing from 100°C to >1,200°C and the deposition of low-temperature SiGe, thick doped polysilicon and stress-controlled SiN.
"SPTS is a key partner in enabling our high-performance Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) technology," said Shahin Sharifzadeh, executive VP of Cypress. "Its expertise in thermal processing technology and commitment to customer service are invaluable in helping us to deliver our products to market."
"We are very pleased to have made this milestone shipment to Cypress," said Vivek Rao, VP and GM of SPTS Thermal Products Division. "This shipment demonstrates both the success of the AVP product line and pays testament to the strong partnerships we develop with our customers."
Manufactured at SPTS' Thermal Products Division in San Jose, Calif., the AVP furnace is used for a diverse range of diffusion and low-pressure chemical vapor deposition (LPCVD) applications in the semiconductor, power management, MEMS and compound semiconductor markets. The division maintains development capability on the common wafer sizes for all these markets, from 100 to 300mm.
The AVP is available in a single or dual-boat configuration, providing flexibility and a low CoO solution for all process types. In-situ clean technology enables the AVP to run LPCVD processes for up to two years between quartz change, significantly improving the system uptime and maximizing productivity. Key processes include wafer annealing from 100°C to >1,200°C and the deposition of low-temperature SiGe, thick doped polysilicon and stress-controlled SiN.
"SPTS is a key partner in enabling our high-performance Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) technology," said Shahin Sharifzadeh, executive VP of Cypress. "Its expertise in thermal processing technology and commitment to customer service are invaluable in helping us to deliver our products to market."
"We are very pleased to have made this milestone shipment to Cypress," said Vivek Rao, VP and GM of SPTS Thermal Products Division. "This shipment demonstrates both the success of the AVP product line and pays testament to the strong partnerships we develop with our customers."
North American semiconductor equipment industry posts August 2011 book-to-bill ratio of 0.80
SAN JOSE, USA: North America-based manufacturers of semiconductor equipment posted $1.18 billion in orders in August 2011 (three-month average basis) and a book-to-bill ratio of 0.80, according to the August Book-to-Bill Report published by SEMI. A book-to-bill of 0.80 means that $80 worth of orders were received for every $100 of product billed for the month.
The three-month average of worldwide bookings in August 2011 was $1.18 billion. The bookings figure is 8.8 percent less than the final July 2011 level of $1.30 billion, and is 34.8 percent below the $1.82 billion in orders posted in August 2010.
The three-month average of worldwide billings in August 2011 was $1.48 billion. The billings figure is 3.0 percent less than the final July 2011 level of $1.52 billion, and is 5.1 percent less than the August 2010 billings level of $1.55 billion.
“Weaker DRAM demand, foundry spending reductions and near-term uncertainties about electronics demand are reflected in declining sales trends for new semiconductor manufacturing equipment,” said Stanley T. Myers, president and CEO of SEMI. “Consequently, the SEMI 3-month average billings are at levels last seen in June of 2010.”
Source: SEMI, USA.
The three-month average of worldwide bookings in August 2011 was $1.18 billion. The bookings figure is 8.8 percent less than the final July 2011 level of $1.30 billion, and is 34.8 percent below the $1.82 billion in orders posted in August 2010.
The three-month average of worldwide billings in August 2011 was $1.48 billion. The billings figure is 3.0 percent less than the final July 2011 level of $1.52 billion, and is 5.1 percent less than the August 2010 billings level of $1.55 billion.
“Weaker DRAM demand, foundry spending reductions and near-term uncertainties about electronics demand are reflected in declining sales trends for new semiconductor manufacturing equipment,” said Stanley T. Myers, president and CEO of SEMI. “Consequently, the SEMI 3-month average billings are at levels last seen in June of 2010.”
Source: SEMI, USA.
Thursday, September 29, 2011
Microsemi delivers complete, space-saving SATA storage systems for secure defense and aerospace apps
ALISO VIEJO, USA: Microsemi Corp., a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, launched the first in a family of complete SATA storage systems for secure embedded defense applications.
The compact MSM37 and MSM75 solutions are each packaged as a single 32mm x 28mm 522 PBGA (plastic ball grid array) and provide up to 75 gigabytes (GB) of NAND flash solid state storage. The combination of these features makes the devices ideal for applications where a full-size 2.5 inch storage device is too large.
Advanced security features include AES-128 encryption, self-destruct capability and whole-module erase with "push-button" trigger option, which are essential for mission-critical defense and aerospace applications, ruggedized mobile systems, surveillance, avionics, navigation and ruggedized portable storage solutions.
"Our ability to miniaturize microelectronics systems has proven to be a key advantage in defense applications where SWaP solutions are critical," said Jack Bogdanski, director of marketing for Microsemi. "Offering a complete solid state storage system in a compact module allows designers to add more features to their systems, while supporting key security features that are increasingly important to our defense and aerospace customers."
The BGA package, available in 37 and 75 GB densities, combines a SATA flash controller with the latest in small geometry single line cell (SLC) NAND flash. The device includes a single supply with extended hold-up time without super caps or batteries. The BGA saves up to 60 percent board space when compared with a similar PCB design.
The compact MSM37 and MSM75 solutions are each packaged as a single 32mm x 28mm 522 PBGA (plastic ball grid array) and provide up to 75 gigabytes (GB) of NAND flash solid state storage. The combination of these features makes the devices ideal for applications where a full-size 2.5 inch storage device is too large.
Advanced security features include AES-128 encryption, self-destruct capability and whole-module erase with "push-button" trigger option, which are essential for mission-critical defense and aerospace applications, ruggedized mobile systems, surveillance, avionics, navigation and ruggedized portable storage solutions.
"Our ability to miniaturize microelectronics systems has proven to be a key advantage in defense applications where SWaP solutions are critical," said Jack Bogdanski, director of marketing for Microsemi. "Offering a complete solid state storage system in a compact module allows designers to add more features to their systems, while supporting key security features that are increasingly important to our defense and aerospace customers."
The BGA package, available in 37 and 75 GB densities, combines a SATA flash controller with the latest in small geometry single line cell (SLC) NAND flash. The device includes a single supply with extended hold-up time without super caps or batteries. The BGA saves up to 60 percent board space when compared with a similar PCB design.
FSI gains acceptance for ORION system from leading Asian foundry
MINNEAPOLIS, USA: FSI International Inc., a leading manufacturer of surface conditioning equipment for microelectronics manufacturing, announced that it gained acceptance for an ORION Single Wafer Cleaning System from a leading Asian foundry producer. The customer has qualified the system for front-end-of-line (FEOL) 28 nanometer cleaning processes and will use it for all-wet photoresist stripping applications using the high-temperature ViPR process. The company expects to recognize revenue for this system in the first quarter of fiscal 2012.
Several leading integrated circuit manufacturers are finding that the unique closed chamber design of the ORION System permits safe use of aggressive, high-temperature ViPR process technology for all-wet removal of highly implanted photoresist. FSI's differentiated ViPR technology minimizes material loss, lowers defectivity and has proven cost of ownership advantages. The process chamber design with an integrated spray bar, improves uniformity, shortens process time, reduces chemical consumption and enhances particle removal.
FSI International is a global supplier of surface conditioning equipment, technology and support services for microelectronics manufacturing. Using the company’s broad portfolio of cleaning products, which include batch and single-wafer platforms for immersion, spray, vapor and cryogenic aerosol technologies, customers are able to achieve their process performance flexibility and productivity goals. The company’s support services programs provide product and process enhancements to extend the life of installed FSI equipment, enabling worldwide customers to realize a higher return on their capital investment.
Several leading integrated circuit manufacturers are finding that the unique closed chamber design of the ORION System permits safe use of aggressive, high-temperature ViPR process technology for all-wet removal of highly implanted photoresist. FSI's differentiated ViPR technology minimizes material loss, lowers defectivity and has proven cost of ownership advantages. The process chamber design with an integrated spray bar, improves uniformity, shortens process time, reduces chemical consumption and enhances particle removal.
FSI International is a global supplier of surface conditioning equipment, technology and support services for microelectronics manufacturing. Using the company’s broad portfolio of cleaning products, which include batch and single-wafer platforms for immersion, spray, vapor and cryogenic aerosol technologies, customers are able to achieve their process performance flexibility and productivity goals. The company’s support services programs provide product and process enhancements to extend the life of installed FSI equipment, enabling worldwide customers to realize a higher return on their capital investment.
Synopsys to sell ARM fast models and develop new fast-timed models of ARM Cortex processors
MOUNTAIN VIEW, USA & CAMBRIDGE, UK: Synopsys Inc. and ARM announced a licensing agreement enabling Synopsys to distribute ARM's Fast Models and create models of ARM Cortex Series processors. Designers will be able to accelerate embedded software development for ARM technology-based designs by up to nine months by creating virtual prototypes using ARM models with Synopsys' DesignWare TLM, SystemC TLM Libraries and Virtualizer tool set. ARM Fast Models and other ARM transaction-level models (TLMs) are listed on the newly launched TLMCentral web portal.
"The combination of ARM Fast Models, ARM software tools and Synopsys' solution for virtual prototyping delivers a powerful capability to developers of ARM technology-based SoCs," said John Cornish, executive VP, System Design Division, ARM. "Synopsys' ability to integrate ARM Fast Models has already provided great benefits to ARM partners who use Synopsys' technology to accelerate software development. The new agreement includes the latest generation of ARM and Synopsys products, and enhances hardware/software performance validation for joint customers."
Combining ARM processor models with Synopsys' Virtualizer tool set and broad portfolio of transaction-level models enables design teams to rapidly create and deploy virtual prototypes. The agreement allows Synopsys to distribute ARM Fast Models of Cortex processors that ARM has validated against its processor validation suite. This includes modeling of advanced ARM technologies, such as TrustZone and Vector Floating Point (VFP). In addition to the Virtualizer tool set's advanced debug and analysis capabilities, designers can also take advantage of the performance and early availability of these models. This allows them to accelerate virtual prototype development, enabling software design to start up to 12 months before the first silicon is available.
Synopsys' technology for developing fast-timed models of ARM processors provides designers with solutions early in the design cycle that are orders of magnitude faster than RTL simulation or emulation. Synopsys-developed fast-timed models offer the timing accuracy needed for comprehensive system performance optimization. They also support speeds suitable for executing complex software applications, including those that run on multicore platforms.
"SoC designers are increasingly turning to multicore implementations to meet their performance objectives, which makes developing and testing software a more complex, effort-intensive task," said Joachim Kunkel, senior VP and GM for IP & systems at Synopsys. "This agreement with ARM immediately extends our solution for fast and accurate system-level simulation, making Synopsys the leading supplier of virtual prototyping tools, models and services for the latest generation of ARM technology-based designs. This offering enables our mutual customers to start software development earlier and dramatically boost their design productivity."
The ARM Fast Models for Cortex processors are available now from Synopsys.
"The combination of ARM Fast Models, ARM software tools and Synopsys' solution for virtual prototyping delivers a powerful capability to developers of ARM technology-based SoCs," said John Cornish, executive VP, System Design Division, ARM. "Synopsys' ability to integrate ARM Fast Models has already provided great benefits to ARM partners who use Synopsys' technology to accelerate software development. The new agreement includes the latest generation of ARM and Synopsys products, and enhances hardware/software performance validation for joint customers."
Combining ARM processor models with Synopsys' Virtualizer tool set and broad portfolio of transaction-level models enables design teams to rapidly create and deploy virtual prototypes. The agreement allows Synopsys to distribute ARM Fast Models of Cortex processors that ARM has validated against its processor validation suite. This includes modeling of advanced ARM technologies, such as TrustZone and Vector Floating Point (VFP). In addition to the Virtualizer tool set's advanced debug and analysis capabilities, designers can also take advantage of the performance and early availability of these models. This allows them to accelerate virtual prototype development, enabling software design to start up to 12 months before the first silicon is available.
Synopsys' technology for developing fast-timed models of ARM processors provides designers with solutions early in the design cycle that are orders of magnitude faster than RTL simulation or emulation. Synopsys-developed fast-timed models offer the timing accuracy needed for comprehensive system performance optimization. They also support speeds suitable for executing complex software applications, including those that run on multicore platforms.
"SoC designers are increasingly turning to multicore implementations to meet their performance objectives, which makes developing and testing software a more complex, effort-intensive task," said Joachim Kunkel, senior VP and GM for IP & systems at Synopsys. "This agreement with ARM immediately extends our solution for fast and accurate system-level simulation, making Synopsys the leading supplier of virtual prototyping tools, models and services for the latest generation of ARM technology-based designs. This offering enables our mutual customers to start software development earlier and dramatically boost their design productivity."
The ARM Fast Models for Cortex processors are available now from Synopsys.
First industry-wide web portal for transaction-level model access welcomes model developers and users
MOUNTAIN VIEW, USA: Synopsys Inc. announced the launch of TLMCentral, the first industry-wide web portal for developers and users of transaction-level model (TLM) technology.
TLMCentral aggregates information about free and commercial system-level models of common system-on-chip (SoC) components from leading semiconductor IP vendors, tool providers, service companies and universities. TLMCentral is an open portal that will ease and accelerate the development of virtual prototypes across the industry. It is available at no cost to users and providers of transaction-level models.
What users can find:
* An initial listing of more than 600 system-level models of common SoC building blocks such as processor, interface and interconnect IP.
* Modeling support from experts around the world through a broad community of leading IP vendors, tool providers, service companies, consultants and universities.
* A centralized online resource with intuitive search functionality to find relevant models as well as industry news, forums and blogs.
Transaction-level models raise designer productivity by increasing the level of abstraction at which they design. TLMs are predominantly used in virtual prototypes which allow engineers to accelerate their software design schedules by up to nine months and significantly improve the productivity of their software development, hardware/software integration, and system validation tasks. Transaction-level modeling has also contributed to significant productivity gains in architecture design and SoC verification, and the models aggregated on TLMCentral can be applied to those use cases as well.
"TLMCentral is aligned with ARM's strategy to participate in industry initiatives that accelerate product development cycles and further increase the rapid pace of innovation around the ARM architecture," said Lance Howarth, executive VP of marketing, ARM. "By listing ARM Fast Models on TLMCentral, we want to enable designers to efficiently source the transactional models and support they need to build virtual prototypes more quickly and start software development earlier."
"TI believes that the TLMCentral initiative has the potential to address a significant gap in the virtual platform ecosystem by enabling a supply of high quality interoperable models," Amit Nene, engineering manager, Texas Instruments. "TI has invested in and benefited from the use of virtual platforms and it would be great to be able to leverage such a repository to shrink time-to-market."
Escalating software content in semiconductor and electronic products is driving the adoption of virtual prototyping, which enables software development to start earlier and be completed with less effort than traditional methods. Until now, virtual prototype developers lacked a centralized resource for finding TLMs available from third-parties, often re-creating models that had already been developed. TLMCentral greatly improves the efficiency of developing virtual prototypes by providing an online infrastructure for aggregating free and commercial system-level models from across the industry, including more than 600 models at launch.
Using an intuitive search interface, engineers can rapidly find models at varying levels of speed and accuracy that are available for their design blocks. These models are contributed by leading IP vendors around the world including ARM, Arteris, CEVA, MIPS, Sonics, Synopsys, Tensilica and Vivante; leading service providers including HCL Technologies and Kasura; and leading research institutes including Industrial Technology Research Institute (ITRI) and RWTH Aachen University. In addition, TLMCentral offers industry news, forums and blogs to connect the TLM community.
"The embedded software market has historically benefited from open industry efforts like TLMCentral," commented Chris Rommel, VP, Embedded Software & Hardware, VDC. "To be successful, an industry-wide effort needs to focus not just on the models themselves, but also transaction-level modeling methodology and community participation. We think the portal's interactive features such as the forums and initial support from various vendors are a great start in that direction."
"With the OSCI TLM-2.0 standard widely accepted by the industry, the introduction of an open portal takes an important step to ease the development, promotion and adoption of models based on our standard," said Eric Lish, chairman of the Open SystemC Initiative. "We welcome this new collaboration between model creators and users to further develop and improve the TLM ecosystem."
"TLMCentral represents an important milestone for the system-level community and with over 600 models already referenced, the portal is off to a strong start," said Joachim Kunkel, senior VP and GM for IP and systems at Synopsys. "TLMCentral's unique combination of instant access to models, information and expertise brings immediate value to anyone looking to accelerate their virtual prototype development or promote their models."
TLMCentral aggregates information about free and commercial system-level models of common system-on-chip (SoC) components from leading semiconductor IP vendors, tool providers, service companies and universities. TLMCentral is an open portal that will ease and accelerate the development of virtual prototypes across the industry. It is available at no cost to users and providers of transaction-level models.
What users can find:
* An initial listing of more than 600 system-level models of common SoC building blocks such as processor, interface and interconnect IP.
* Modeling support from experts around the world through a broad community of leading IP vendors, tool providers, service companies, consultants and universities.
* A centralized online resource with intuitive search functionality to find relevant models as well as industry news, forums and blogs.
Transaction-level models raise designer productivity by increasing the level of abstraction at which they design. TLMs are predominantly used in virtual prototypes which allow engineers to accelerate their software design schedules by up to nine months and significantly improve the productivity of their software development, hardware/software integration, and system validation tasks. Transaction-level modeling has also contributed to significant productivity gains in architecture design and SoC verification, and the models aggregated on TLMCentral can be applied to those use cases as well.
"TLMCentral is aligned with ARM's strategy to participate in industry initiatives that accelerate product development cycles and further increase the rapid pace of innovation around the ARM architecture," said Lance Howarth, executive VP of marketing, ARM. "By listing ARM Fast Models on TLMCentral, we want to enable designers to efficiently source the transactional models and support they need to build virtual prototypes more quickly and start software development earlier."
"TI believes that the TLMCentral initiative has the potential to address a significant gap in the virtual platform ecosystem by enabling a supply of high quality interoperable models," Amit Nene, engineering manager, Texas Instruments. "TI has invested in and benefited from the use of virtual platforms and it would be great to be able to leverage such a repository to shrink time-to-market."
Escalating software content in semiconductor and electronic products is driving the adoption of virtual prototyping, which enables software development to start earlier and be completed with less effort than traditional methods. Until now, virtual prototype developers lacked a centralized resource for finding TLMs available from third-parties, often re-creating models that had already been developed. TLMCentral greatly improves the efficiency of developing virtual prototypes by providing an online infrastructure for aggregating free and commercial system-level models from across the industry, including more than 600 models at launch.
Using an intuitive search interface, engineers can rapidly find models at varying levels of speed and accuracy that are available for their design blocks. These models are contributed by leading IP vendors around the world including ARM, Arteris, CEVA, MIPS, Sonics, Synopsys, Tensilica and Vivante; leading service providers including HCL Technologies and Kasura; and leading research institutes including Industrial Technology Research Institute (ITRI) and RWTH Aachen University. In addition, TLMCentral offers industry news, forums and blogs to connect the TLM community.
"The embedded software market has historically benefited from open industry efforts like TLMCentral," commented Chris Rommel, VP, Embedded Software & Hardware, VDC. "To be successful, an industry-wide effort needs to focus not just on the models themselves, but also transaction-level modeling methodology and community participation. We think the portal's interactive features such as the forums and initial support from various vendors are a great start in that direction."
"With the OSCI TLM-2.0 standard widely accepted by the industry, the introduction of an open portal takes an important step to ease the development, promotion and adoption of models based on our standard," said Eric Lish, chairman of the Open SystemC Initiative. "We welcome this new collaboration between model creators and users to further develop and improve the TLM ecosystem."
"TLMCentral represents an important milestone for the system-level community and with over 600 models already referenced, the portal is off to a strong start," said Joachim Kunkel, senior VP and GM for IP and systems at Synopsys. "TLMCentral's unique combination of instant access to models, information and expertise brings immediate value to anyone looking to accelerate their virtual prototype development or promote their models."
NeoPhotonics to acquire Santur
SAN JOSE, USA: NeoPhotonics Corp., a leading designer and manufacturer of photonic integrated circuit, or PIC, based modules and subsystems for bandwidth-intensive, high speed communications networks, and Santur Corp., a leading designer and manufacturer of Indium Phosphide (InP) based PIC products, have entered into a definitive agreement under which NeoPhotonics will acquire privately held Santur.
Santur is a world leader in high-performance tunable laser arrays for metro and long-haul DWDM systems and a leading developer of PIC-based products for 40Gbps and 100Gbps client side and coherent line side applications.
NeoPhotonics has agreed to pay an estimated $39.2 million in cash for Santur, after deductions for closing costs and other adjustments, plus up to $7.5 million additional cash contingent on the financial performance of Santur products subsequent to closing of the transaction through the end of 2012.
Founded in November 2000, Santur is a private company located in Fremont, California, and is focused on commercializing PIC-based laser array and packaging technologies for communications. Santur’s technology includes established telecom designs offering elegant approaches to wide tunability as well as high speed transceivers. The company’s products are designed to provide reduced size, power consumption and cost for a wide range of DWDM, Coherent and Client Side networking applications in 10G, 40G and 100G networks.
“Santur has developed innovative indium phosphide (InP) based photonic integration products that are critical elements in 100G coherent transmitters and that complement the NeoPhotonics PIC-based 100G coherent receiver product line,” said Tim Jenks, chairman and CEO of NeoPhotonics. “By combining active InP PICs from Santur with our hybrid PICs, we can provide our customers with new products for 100G coherent systems that feature higher levels of integration, higher performance and greater functionality. Furthermore, Santur’s advanced tunable laser products also fit with our Speed and Agility product lines, enabling us to provide customers more complete solutions for reconfigurable networks.”
“In addition, Santur is a leading provider of PIC-based 40 and 100 Gbps transceiver modules for client side and data center applications. NeoPhotonics recently entered this new and rapidly growing market segment with its first products. By combining Santur’s products, roadmap and strong customer positions with the NeoPhotonics portfolio of products, vertically integrated and high volume manufacturing capabilities, and complementary customer set, we intend to further develop our 100G coherent line side products and rapidly establish NeoPhotonics as a major vendor of client side components for the cloud,” concluded Jenks.
“Our InP PIC technologies form the foundation for our line of innovative products that we have successfully developed and sold to leading customers around the world. We believe that the combination of our technology and products with complementary technology and products from NeoPhotonics can provide compelling value to our customers. This is a case of the sum being much greater than the parts, and we believe that NeoPhotonics represents an excellent strategic fit for Santur,” said Paul Meissner, president and CEO of Santur.
Santur generated revenue of approximately $21 million for the six months ending June 30, 2011. It plans to provide addition financial information relating to Santur along with guidance for the fourth quarter of 2011 when NeoPhotonics releases its financial results for the third quarter of 2011. The board of directors and stockholders of Santur have each approved the transaction. The parties expect the transaction to close in the fourth calendar quarter of 2011.
Santur is a world leader in high-performance tunable laser arrays for metro and long-haul DWDM systems and a leading developer of PIC-based products for 40Gbps and 100Gbps client side and coherent line side applications.
NeoPhotonics has agreed to pay an estimated $39.2 million in cash for Santur, after deductions for closing costs and other adjustments, plus up to $7.5 million additional cash contingent on the financial performance of Santur products subsequent to closing of the transaction through the end of 2012.
Founded in November 2000, Santur is a private company located in Fremont, California, and is focused on commercializing PIC-based laser array and packaging technologies for communications. Santur’s technology includes established telecom designs offering elegant approaches to wide tunability as well as high speed transceivers. The company’s products are designed to provide reduced size, power consumption and cost for a wide range of DWDM, Coherent and Client Side networking applications in 10G, 40G and 100G networks.
“Santur has developed innovative indium phosphide (InP) based photonic integration products that are critical elements in 100G coherent transmitters and that complement the NeoPhotonics PIC-based 100G coherent receiver product line,” said Tim Jenks, chairman and CEO of NeoPhotonics. “By combining active InP PICs from Santur with our hybrid PICs, we can provide our customers with new products for 100G coherent systems that feature higher levels of integration, higher performance and greater functionality. Furthermore, Santur’s advanced tunable laser products also fit with our Speed and Agility product lines, enabling us to provide customers more complete solutions for reconfigurable networks.”
“In addition, Santur is a leading provider of PIC-based 40 and 100 Gbps transceiver modules for client side and data center applications. NeoPhotonics recently entered this new and rapidly growing market segment with its first products. By combining Santur’s products, roadmap and strong customer positions with the NeoPhotonics portfolio of products, vertically integrated and high volume manufacturing capabilities, and complementary customer set, we intend to further develop our 100G coherent line side products and rapidly establish NeoPhotonics as a major vendor of client side components for the cloud,” concluded Jenks.
“Our InP PIC technologies form the foundation for our line of innovative products that we have successfully developed and sold to leading customers around the world. We believe that the combination of our technology and products with complementary technology and products from NeoPhotonics can provide compelling value to our customers. This is a case of the sum being much greater than the parts, and we believe that NeoPhotonics represents an excellent strategic fit for Santur,” said Paul Meissner, president and CEO of Santur.
Santur generated revenue of approximately $21 million for the six months ending June 30, 2011. It plans to provide addition financial information relating to Santur along with guidance for the fourth quarter of 2011 when NeoPhotonics releases its financial results for the third quarter of 2011. The board of directors and stockholders of Santur have each approved the transaction. The parties expect the transaction to close in the fourth calendar quarter of 2011.
Keithley adds support for NVM, very low frequency C-V, and increased parallel testing to semiconductor parameter analyzer
CLEVELAND, USA: Keithley Instruments Inc., a world leader in advanced electrical test instruments and systems, has introduced a variety of enhancements for its award-winning Model 4200-SCS Semiconductor Characterization System.
The Keithley Test Environment Interactive (KTEI) V8.2 upgrade includes new non-volatile memory (NVM) test libraries and sample projects for a variety of emerging memory technologies. The upgrade also supports making very low frequency capacitance-voltage (C-V) measurements, which are useful for characterizing device technologies such as polymer electronics, organic LEDs (OLEDs), and OLED-based displays.
In addition, KTEI V8.2 supports Model 4200-SCS system configurations with more ultra-fast current-voltage (I-V) test modules than any competitive solution, so users can test even more devices in parallel, increasing test throughput and reducing time to market.
New non-volatile memory test libraries
The new NVM test libraries included in KTEI V8.2 expand the system’s capabilities for testing all types of non-volatile memory devices, including flash, phase change memory (PRAM and PC-RAM), resistive memory (RRAM or ReRAM), and magnetoresistive (MRAM) memory devices.
KTEI V8.2 provides a common set of test libraries for testing the various NVM technologies while incorporating the unique measurement hardware requirements associated with each. The sample projects included for each type of NVM provide the flexibility that researchers need to set up and execute tests quickly, as well as to analyze data. The examples are designed to adapt easily to use with most emerging memory technologies.
The test libraries are designed to build on the capabilities provided in two of the newest hardware options for the Model 4200-SCS, the Model 4225-PMU Ultra-Fast I-V Module, and the Model 4225-RPM Remote Amplifier/Switch Module. Together, these new modules allow precise sourcing of high speed pulses, as well as accurate measurements of the transient signals produced during testing.
The Model 4225-PMU measures voltage and current simultaneously at high speeds over a wide dynamic range. The Model 4225-RPM moves the measurement circuitry of the Model 4225-PMU module closer to the DUT to minimize the effects of stray capacitance while providing additional low current measurement ranges. The Model 4225-RPM also provides fast automatic switching between the 4225-PMU and the system’s capacitance-voltage (C-V) and DC source-measure units, which helps simplify the test configuration and reduces the time required to complete test sequences.
Very low frequency C-V measurements
Semiconductor R&D typically requires a combination of quasistatic (ramp rate) and high frequency techniques for measuring the capacitance of device structures. However, when applied to devices with too much current flow or leakage, quasistatic C-V has some limitations; for example, parallel resistance cannot be extracted effectively and the results can be quite noisy. A variety of device technologies now require AC-based capacitance characterization at very low frequencies—much lower than the minimum frequency of multi-frequency C-V meters or LCRs.
Measuring small capacitances at low frequencies translates to extremely high impedance values, which AC-based measurement instruments often cannot characterize accurately. KTEI V8.2 includes a new patent-pending technique for making very low frequency capacitance-voltage (VLF C-V) measurements with the system’s DC SMUs and low current remote pre-amplifier that allows measuring device capacitance and resistance at frequencies from 10Hz down to 10mHz. This new technique complements the optional Model 4210-CVU capacitance meter’s existing high frequency (1kHz to 10MHz) capabilities.
Extended support for ultra-fast I-V hardware
The Model 4200-SCS system can now support up to six Model 4225-PMU modules in its nine-slot chassis. Each module provides two channels of voltage pulse sourcing (with pulse widths ranging from 60 nanoseconds to DC) and simultaneous current and voltage measurement at acquisition rates of up to 200 megasamples/second (MS/s), so it’s now possible to configure a system with up to 12 simultaneous ultra-fast I-V channels.
By boosting the maximum number of Model 4225-PMU modules the Model 4200-SCS can support, KTEI V8.2 expands the system’s ability to characterize multiple devices quickly by testing them in parallel, which is increasingly important as new devices move from the R&D lab toward production. This higher level of parallel test can be applied to testing a device’s ultra-fast bias temperature instability (NBTI), a transient failure mechanism that requires high speed measurements to characterize, as well as to other forms of device reliability testing and multi-DUT NVM testing. By supporting higher test throughput, KTEI V8.2 helps shorten time to market and offers more effective process control.
Model 4200-SCS background
Keithley’s Model 4200-SCS semiconductor parameter analyzer replaces a variety of electrical test tools with a single, tightly integrated characterization solution that is ideal for a wide variety of semiconductor test applications including technology development, process development, and materials research in reliability labs, materials and device research labs and consortia, as well as any lab needing a benchtop DC or pulse instrument.
Keithley has continually enhanced the Model 4200-SCS’s hardware and software ever since its introduction. This commitment to ongoing system innovation ensures a cost-effective upgrade path, so users don’t have to buy a new parametric analyzer because their old one is obsolete. Systems can be upgraded cost-effectively to keep up with the industry's evolving test needs, so capital investments in the Model 4200-SCS stretch much further than with competitive test solutions.
The Keithley Test Environment Interactive (KTEI) V8.2 upgrade includes new non-volatile memory (NVM) test libraries and sample projects for a variety of emerging memory technologies. The upgrade also supports making very low frequency capacitance-voltage (C-V) measurements, which are useful for characterizing device technologies such as polymer electronics, organic LEDs (OLEDs), and OLED-based displays.
In addition, KTEI V8.2 supports Model 4200-SCS system configurations with more ultra-fast current-voltage (I-V) test modules than any competitive solution, so users can test even more devices in parallel, increasing test throughput and reducing time to market.
New non-volatile memory test libraries
The new NVM test libraries included in KTEI V8.2 expand the system’s capabilities for testing all types of non-volatile memory devices, including flash, phase change memory (PRAM and PC-RAM), resistive memory (RRAM or ReRAM), and magnetoresistive (MRAM) memory devices.
KTEI V8.2 provides a common set of test libraries for testing the various NVM technologies while incorporating the unique measurement hardware requirements associated with each. The sample projects included for each type of NVM provide the flexibility that researchers need to set up and execute tests quickly, as well as to analyze data. The examples are designed to adapt easily to use with most emerging memory technologies.
The test libraries are designed to build on the capabilities provided in two of the newest hardware options for the Model 4200-SCS, the Model 4225-PMU Ultra-Fast I-V Module, and the Model 4225-RPM Remote Amplifier/Switch Module. Together, these new modules allow precise sourcing of high speed pulses, as well as accurate measurements of the transient signals produced during testing.
The Model 4225-PMU measures voltage and current simultaneously at high speeds over a wide dynamic range. The Model 4225-RPM moves the measurement circuitry of the Model 4225-PMU module closer to the DUT to minimize the effects of stray capacitance while providing additional low current measurement ranges. The Model 4225-RPM also provides fast automatic switching between the 4225-PMU and the system’s capacitance-voltage (C-V) and DC source-measure units, which helps simplify the test configuration and reduces the time required to complete test sequences.
Very low frequency C-V measurements
Semiconductor R&D typically requires a combination of quasistatic (ramp rate) and high frequency techniques for measuring the capacitance of device structures. However, when applied to devices with too much current flow or leakage, quasistatic C-V has some limitations; for example, parallel resistance cannot be extracted effectively and the results can be quite noisy. A variety of device technologies now require AC-based capacitance characterization at very low frequencies—much lower than the minimum frequency of multi-frequency C-V meters or LCRs.
Measuring small capacitances at low frequencies translates to extremely high impedance values, which AC-based measurement instruments often cannot characterize accurately. KTEI V8.2 includes a new patent-pending technique for making very low frequency capacitance-voltage (VLF C-V) measurements with the system’s DC SMUs and low current remote pre-amplifier that allows measuring device capacitance and resistance at frequencies from 10Hz down to 10mHz. This new technique complements the optional Model 4210-CVU capacitance meter’s existing high frequency (1kHz to 10MHz) capabilities.
Extended support for ultra-fast I-V hardware
The Model 4200-SCS system can now support up to six Model 4225-PMU modules in its nine-slot chassis. Each module provides two channels of voltage pulse sourcing (with pulse widths ranging from 60 nanoseconds to DC) and simultaneous current and voltage measurement at acquisition rates of up to 200 megasamples/second (MS/s), so it’s now possible to configure a system with up to 12 simultaneous ultra-fast I-V channels.
By boosting the maximum number of Model 4225-PMU modules the Model 4200-SCS can support, KTEI V8.2 expands the system’s ability to characterize multiple devices quickly by testing them in parallel, which is increasingly important as new devices move from the R&D lab toward production. This higher level of parallel test can be applied to testing a device’s ultra-fast bias temperature instability (NBTI), a transient failure mechanism that requires high speed measurements to characterize, as well as to other forms of device reliability testing and multi-DUT NVM testing. By supporting higher test throughput, KTEI V8.2 helps shorten time to market and offers more effective process control.
Model 4200-SCS background
Keithley’s Model 4200-SCS semiconductor parameter analyzer replaces a variety of electrical test tools with a single, tightly integrated characterization solution that is ideal for a wide variety of semiconductor test applications including technology development, process development, and materials research in reliability labs, materials and device research labs and consortia, as well as any lab needing a benchtop DC or pulse instrument.
Keithley has continually enhanced the Model 4200-SCS’s hardware and software ever since its introduction. This commitment to ongoing system innovation ensures a cost-effective upgrade path, so users don’t have to buy a new parametric analyzer because their old one is obsolete. Systems can be upgraded cost-effectively to keep up with the industry's evolving test needs, so capital investments in the Model 4200-SCS stretch much further than with competitive test solutions.
Fujitsu selects Mentor Graphics Sourcery CodeBench for FM3 MCU family embedded development
LANGEN, GERMANY & WILSONVILLE, USA: Fujitsu Semiconductor Europe and Mentor Graphics Corp. announced that Fujitsu has chosen the Mentor Embedded Sourcery CodeBench for ARM EABI (embedded application binary interface) to support Fujitsu’s FM3 Cortex-M3 microcontrollers and hardware evaluation boards.
Fujitsu’s selection is based on providing its customers with a software development ecosystem that incorporates a high-quality GNU toolchain that enables customers to begin compiling and debugging embedded software on evaluation boards within minutes of product installation. The evaluation boards support bare-metal and real-time operating system (RTOS) applications—including consumer and industrial—for Fujitsu’s FM3 series of 32-bit, general-purpose microcontrollers.
“Mentor’s Sourcery CodeBench is the de-facto standard GNU toolchain for a broad range of hardware architectures,” said Wolf Fronauer, marketing manager, Fujitsu Semiconductor Europe. “Our mission was to create an embedded ecosystem for both bare metal and OS development, enabling our customers to compile, debug, and test with greater reliability and speed.”
The Mentor Embedded Sourcery CodeBench technology delivers a high-quality and low-cost integrated development environment (IDE). The Sourcery CodeBench tool provides a standardized cross-architecture integrated package containing open source components including the GNU toolchain and Eclipse IDE. This standardization provides a common ecosystem for Fujitsu processor customers, with the Mentor Embedded team lending essential technical support services.
The Sourcery CodeBench product, combined with hardware evaluation boards for Fujitsu FM3 devices, offers a complete out-of-box solution to embedded developers. The Mentor Embedded Sourcery Probes and other JTAG probes supported by Sourcery CodeBench permit hardware debugging of the evaluation boards from a host system. Thus, developers using Fujitsu devices can compile and debug on these evaluation boards within minutes of installing the Sourcery CodeBench tool.
“Fujitsu is a global leader and its next-generation FM3 family of microcontrollers can be found in factory automation, white goods, industrial and consumer electronics, where developers need to compete with speed and reliability,” said Mark Mitchell, director of tools, Mentor Graphics Embedded Software Division. “Sourcery CodeBench will help Fujitsu customers realise the productivity and performance gains required for device optimization, thereby serving as a competitive advantage.”
Fujitsu’s choice of Sourcery CodeBench supports the recently announced Mentor Embedded Hardware Enablement Program. The program provides a range of comprehensive services and training for embedded Android, Linux®, open source tools (GNU, GCC, Eclipse), user interface creation, and vertical markets, such as in-vehicle infotainment (IVI), smart energy, and retail applications designed specifically for hardware companies.
Kit support for the Fujitsu FM3 family of Cortex-M3 microcontrollers is available now and the offering includes support for target hardware evaluation boards: SK-FM3-100PMC-JLink, SK-FM3-64PMC1 and SK-FM3-176PMC-ETHERNET; Fujitsu FM3 C/C++ example applications and documentation.
Mentor Graphics Embedded Software Division comprises the Mentor Embedded family of products and services, including embedded software intellectual property (IP), tools, and professional consultant services to help embedded developers and silicon partners optimize their products for design and cost efficiency. The Mentor Embedded team continues to lead the industry with involvement in the open source community and in innovations such as Android beyond mobile handsets, 2D and 3D UI development, open source tools, and multi-OS on multicore architectures.
Fujitsu’s selection is based on providing its customers with a software development ecosystem that incorporates a high-quality GNU toolchain that enables customers to begin compiling and debugging embedded software on evaluation boards within minutes of product installation. The evaluation boards support bare-metal and real-time operating system (RTOS) applications—including consumer and industrial—for Fujitsu’s FM3 series of 32-bit, general-purpose microcontrollers.
“Mentor’s Sourcery CodeBench is the de-facto standard GNU toolchain for a broad range of hardware architectures,” said Wolf Fronauer, marketing manager, Fujitsu Semiconductor Europe. “Our mission was to create an embedded ecosystem for both bare metal and OS development, enabling our customers to compile, debug, and test with greater reliability and speed.”
The Mentor Embedded Sourcery CodeBench technology delivers a high-quality and low-cost integrated development environment (IDE). The Sourcery CodeBench tool provides a standardized cross-architecture integrated package containing open source components including the GNU toolchain and Eclipse IDE. This standardization provides a common ecosystem for Fujitsu processor customers, with the Mentor Embedded team lending essential technical support services.
The Sourcery CodeBench product, combined with hardware evaluation boards for Fujitsu FM3 devices, offers a complete out-of-box solution to embedded developers. The Mentor Embedded Sourcery Probes and other JTAG probes supported by Sourcery CodeBench permit hardware debugging of the evaluation boards from a host system. Thus, developers using Fujitsu devices can compile and debug on these evaluation boards within minutes of installing the Sourcery CodeBench tool.
“Fujitsu is a global leader and its next-generation FM3 family of microcontrollers can be found in factory automation, white goods, industrial and consumer electronics, where developers need to compete with speed and reliability,” said Mark Mitchell, director of tools, Mentor Graphics Embedded Software Division. “Sourcery CodeBench will help Fujitsu customers realise the productivity and performance gains required for device optimization, thereby serving as a competitive advantage.”
Fujitsu’s choice of Sourcery CodeBench supports the recently announced Mentor Embedded Hardware Enablement Program. The program provides a range of comprehensive services and training for embedded Android, Linux®, open source tools (GNU, GCC, Eclipse), user interface creation, and vertical markets, such as in-vehicle infotainment (IVI), smart energy, and retail applications designed specifically for hardware companies.
Kit support for the Fujitsu FM3 family of Cortex-M3 microcontrollers is available now and the offering includes support for target hardware evaluation boards: SK-FM3-100PMC-JLink, SK-FM3-64PMC1 and SK-FM3-176PMC-ETHERNET; Fujitsu FM3 C/C++ example applications and documentation.
Mentor Graphics Embedded Software Division comprises the Mentor Embedded family of products and services, including embedded software intellectual property (IP), tools, and professional consultant services to help embedded developers and silicon partners optimize their products for design and cost efficiency. The Mentor Embedded team continues to lead the industry with involvement in the open source community and in innovations such as Android beyond mobile handsets, 2D and 3D UI development, open source tools, and multi-OS on multicore architectures.
Exosite provides One Platform cloud connectivity for Renesas development kits
MINNEAPOLIS, USA: Exosite LLC, a leading provider of cloud-connectivity solutions for devices, is collaborating with Renesas Electronics America Inc. to provide cloud-capable reference designs based on the Renesas RX62N microcontrollers (MCUs).
Under the partnership, Renesas Development Kits for the RX62N MCUs will be enabled off-the-shelf with One Platform cloud connectivity provided by Exosite. Product developers can use the cloud-capable reference design to accelerate time-to-market when creating their own connected products. Exosite’s cloud-based One Platform extends device capabilities to support remote provisioning, in-field management, real-time data visualization and business process integration using Exosite’s Portals tools.
“All of the building blocks - from hardware schematics to cloud-capable firmware to data platform APIs to web dashboards - are all provided and functional out of the box,” said Todd DeBoer, director, Mass Market Group, Consumer & Industrial Business Unit, Renesas Electronics America. “Exosite makes it easy for product developers to create cloud-capable products with our RX MCUs.”
“By providing a production-ready cloud-infrastructure for Renesas RX MCUs, we’ve lowered the barrier-to-entry for engineers designing products requiring industrial-grade processing and cloud-connectivity,” said Hans Rempel, CEO for Exosite. “This means that powerful cloud-connected applications involving real-world devices can be prototyped, designed and deployed in a matter of months.”
Under the partnership, Renesas Development Kits for the RX62N MCUs will be enabled off-the-shelf with One Platform cloud connectivity provided by Exosite. Product developers can use the cloud-capable reference design to accelerate time-to-market when creating their own connected products. Exosite’s cloud-based One Platform extends device capabilities to support remote provisioning, in-field management, real-time data visualization and business process integration using Exosite’s Portals tools.
“All of the building blocks - from hardware schematics to cloud-capable firmware to data platform APIs to web dashboards - are all provided and functional out of the box,” said Todd DeBoer, director, Mass Market Group, Consumer & Industrial Business Unit, Renesas Electronics America. “Exosite makes it easy for product developers to create cloud-capable products with our RX MCUs.”
“By providing a production-ready cloud-infrastructure for Renesas RX MCUs, we’ve lowered the barrier-to-entry for engineers designing products requiring industrial-grade processing and cloud-connectivity,” said Hans Rempel, CEO for Exosite. “This means that powerful cloud-connected applications involving real-world devices can be prototyped, designed and deployed in a matter of months.”
TI, CORE Education & Technologies to deliver STEM solution for Indian schools
NEW DELHI, INDIA: With the launch of Texas Instruments (TI) Education Technology
business in India, TI and CORE Education & Technologies Ltd are joining forces to bring a new way of teaching and learning math and science to middle and secondary schools throughout India.
The joint effort combines TI’s best-in-class education technology solution with CORE’s world-class content, teacher education and support to form one integrated solution called STEMpower.
STEM skills are vital to be successful in the 21st century and critical to the collective future. Through STEMpower, TI and CORE will address teaching, learning and assessment needs in the classroom, in the lab, and in the real world. The solution is designed to support teachers, students and administrators with the technology and
resources they need to ensure that every student has an opportunity to explore, learn, apply and succeed with math and science.
Utilizing TI-Nspire technology by TI, STEMpower empowers teachers to take control of the classroom and save time. This solution connects the teacher’s computer with every student’s handheld device, leading to instant assessment. Teachers have more insight into the progress of each student, can personalize their teaching style to fit class needs, and promote student collaboration.
In the 21st century world, the ownership of learning lies with the student. This ownership can be achieved through deep exploration and practice. STEMpower integrates real-world data, simulations, pictorial aids and multiple representations such as graphs, spreadsheets, equations and questions to encourage students to make connections, explore and become active learners.
For school administrators, STEMpower is a practical solution for creating strong math and science laboratories. It empowers schools to be on the cutting edge of technology integration. The portable solution has little overhead, few infrastructure needs and can be shared by many classrooms. It also enables administrators to quickly and easily gather the results of student assessment, which can be shared with stakeholders.
CORE Education & Technologies, India’s largest global education player with its expertise and reach in Indian education space, will provide comprehensive, curriculum-aligned content that saves teachers time in lesson planning and preparing for class. The high-quality lessons and activities will enable teachers to engage students in the conceptual understanding of difficult-to-learn topics.
CORE will also provide consistent, quality teacher education to ensure that teachers know how to effectively use the technology. The teacher learning program will help them to update their pedagogy skills with the latest trends in classroom teaching methods.
“At Texas Instruments, it is our mission to ensure that every student has an opportunity to stay engaged in learning math and science,” said Melendy Lovett, president of Texas Instruments Education Technology. “As we team up with CORE to introduce STEMpower to the Indian education system, we are focused on providing an integrated, low overhead solution with the right set of tools and resources that educators and schools need to be successful in improving student achievement.”
“At CORE we believe that an energized, empowered and enlightened mind can transform
organizations, societies and nations,” said Sanjeev Mansotra, chairman and global CEO, CORE Education & Technologies. “STEM is about more than just education - it is about our economic future. The viable jobs of the 21st century will require high degrees of STEM literacy, and if our communities don’t have a STEM-literate workforce, those jobs can and will go elsewhere. Our association with Texas Instruments is an important step in bringing revolutions in teaching, learning and assessment of Math and Science in the Indian education space.”
business in India, TI and CORE Education & Technologies Ltd are joining forces to bring a new way of teaching and learning math and science to middle and secondary schools throughout India.
The joint effort combines TI’s best-in-class education technology solution with CORE’s world-class content, teacher education and support to form one integrated solution called STEMpower.
STEM skills are vital to be successful in the 21st century and critical to the collective future. Through STEMpower, TI and CORE will address teaching, learning and assessment needs in the classroom, in the lab, and in the real world. The solution is designed to support teachers, students and administrators with the technology and
resources they need to ensure that every student has an opportunity to explore, learn, apply and succeed with math and science.
Utilizing TI-Nspire technology by TI, STEMpower empowers teachers to take control of the classroom and save time. This solution connects the teacher’s computer with every student’s handheld device, leading to instant assessment. Teachers have more insight into the progress of each student, can personalize their teaching style to fit class needs, and promote student collaboration.
In the 21st century world, the ownership of learning lies with the student. This ownership can be achieved through deep exploration and practice. STEMpower integrates real-world data, simulations, pictorial aids and multiple representations such as graphs, spreadsheets, equations and questions to encourage students to make connections, explore and become active learners.
For school administrators, STEMpower is a practical solution for creating strong math and science laboratories. It empowers schools to be on the cutting edge of technology integration. The portable solution has little overhead, few infrastructure needs and can be shared by many classrooms. It also enables administrators to quickly and easily gather the results of student assessment, which can be shared with stakeholders.
CORE Education & Technologies, India’s largest global education player with its expertise and reach in Indian education space, will provide comprehensive, curriculum-aligned content that saves teachers time in lesson planning and preparing for class. The high-quality lessons and activities will enable teachers to engage students in the conceptual understanding of difficult-to-learn topics.
CORE will also provide consistent, quality teacher education to ensure that teachers know how to effectively use the technology. The teacher learning program will help them to update their pedagogy skills with the latest trends in classroom teaching methods.
“At Texas Instruments, it is our mission to ensure that every student has an opportunity to stay engaged in learning math and science,” said Melendy Lovett, president of Texas Instruments Education Technology. “As we team up with CORE to introduce STEMpower to the Indian education system, we are focused on providing an integrated, low overhead solution with the right set of tools and resources that educators and schools need to be successful in improving student achievement.”
“At CORE we believe that an energized, empowered and enlightened mind can transform
organizations, societies and nations,” said Sanjeev Mansotra, chairman and global CEO, CORE Education & Technologies. “STEM is about more than just education - it is about our economic future. The viable jobs of the 21st century will require high degrees of STEM literacy, and if our communities don’t have a STEM-literate workforce, those jobs can and will go elsewhere. Our association with Texas Instruments is an important step in bringing revolutions in teaching, learning and assessment of Math and Science in the Indian education space.”
Renesas announces high-performance, high-function SoC for high-end automotive display systems
TOKYO, JAPAN: Renesas Electronics Corp. and its subsidiary, Renesas Mobile Corp., an innovative supplier of advanced cellular semiconductor solutions and platforms, announced the availability of the new automotive systems-on-chip (SoC), the SH7769,
for high-end automotive display systems (graphics cluster, multifunction graphics display) supporting advanced human machine interfaces (HMI).
The new SH7769 SoC enhances such functions as video input, display output and high-reliability systems compared to Renesas’ existing SH-Navi3 (SH7776) SoC, which has been widely adopted for high-end automotive infotainment systems. The SH7769 SoC implements functions essential for automotive display systems, such as 3D graphics meters and central displays, markets that are expected to grow rapidly.
Due to the recent increase in demand to process enormous volumes of information through in-car network and multimedia systems, car information systems are required to deliver this information to the driver clearly and safely. The SH7769 SoC implements a high-function 3D graphics engine and display units, which allow 1600 x 480-pixel HD (high definition) video decoding.
A graphical user interface (GUI) display can be used to express and deliver a realistic instrument-cluster system and in-vehicle information to the driver. This GUI allows realistic 3D graphics display and improved operability.
Up to three video data streams can be processed simultaneously to provide a driver with information from external vehicle cameras, navigation systems, and night vision devices at the same time. The SH7769 SoC also contributes to the reduction of system costs by saving a number of external components by integrating such functions as NTSC decoder and an image render (IMR) function, which perform compensation of fish-eye image.
The SH7769 device is packaged in a 496-pin BGA (ball-grid array, 21x21 mm) package with a 0.8mm ball pitch. Samples of Renesas’ SH7769 SoC are available now, priced at $60 per unit. Mass production is scheduled to begin in June 2013 and is expected to reach a cumulative 30,000 units per month in June 2014. (Pricing and availability are subject to change without notice.)
for high-end automotive display systems (graphics cluster, multifunction graphics display) supporting advanced human machine interfaces (HMI).
The new SH7769 SoC enhances such functions as video input, display output and high-reliability systems compared to Renesas’ existing SH-Navi3 (SH7776) SoC, which has been widely adopted for high-end automotive infotainment systems. The SH7769 SoC implements functions essential for automotive display systems, such as 3D graphics meters and central displays, markets that are expected to grow rapidly.
Due to the recent increase in demand to process enormous volumes of information through in-car network and multimedia systems, car information systems are required to deliver this information to the driver clearly and safely. The SH7769 SoC implements a high-function 3D graphics engine and display units, which allow 1600 x 480-pixel HD (high definition) video decoding.
A graphical user interface (GUI) display can be used to express and deliver a realistic instrument-cluster system and in-vehicle information to the driver. This GUI allows realistic 3D graphics display and improved operability.
Up to three video data streams can be processed simultaneously to provide a driver with information from external vehicle cameras, navigation systems, and night vision devices at the same time. The SH7769 SoC also contributes to the reduction of system costs by saving a number of external components by integrating such functions as NTSC decoder and an image render (IMR) function, which perform compensation of fish-eye image.
The SH7769 device is packaged in a 496-pin BGA (ball-grid array, 21x21 mm) package with a 0.8mm ball pitch. Samples of Renesas’ SH7769 SoC are available now, priced at $60 per unit. Mass production is scheduled to begin in June 2013 and is expected to reach a cumulative 30,000 units per month in June 2014. (Pricing and availability are subject to change without notice.)
Samsung’s intros 16Mp CMOS image sensor
Samsung Mobile Solutions Forum 2011, TAIPEI, TAIWAN: Samsung Electronics Co. Ltd has announced its new 1/2.3-inch 16 Megapixel (Mp) CMOS image sensor - the S5K2P1 - with Samsung’s advanced 1.34 micrometer (um) backside illumination (BSI) pixel technology.
This 16Mp resolution imager is designed for high-performance, advanced smartphones as well as digital still cameras and camcorders. Samsung unveiled its new imager technology, including the S5K2P1, at the eighth annual Samsung Mobile Solutions Forum held at the Westin Taipei.
“As the adoption rate of CMOS image sensors in the digital still camera market increases, market demand for imagers such as the S5K2P1, which provides clear and fast video, is expected to grow in 2012,” said Dojun Rhee, VP of System LSI marketing, Device Solutions, Samsung Electronics. “Introducing advanced high-resolution imagers based on BSI pixel technology supports further adoption of Samsung CMOS imagers to compact digital camera and camcorder applications.”
Samsung’s S5K2P1 is an image sensor optimized for compact mobile CE devices, with excellent image quality in video mode. Supporting multiple interfaces, this image sensor is also suited for premium smartphones. The S5K2P1 sensor supports a native 16:9 format video at up to 8.3Mp resolution at 60 frames per second and maximum 16 Megapixel-resolution for point-and-shoot images at 30 frames per second without shutter lag effect.
Using Samsung’s advanced 1.34um BSI pixel technology, the S5K2P1 delivers excellent sensitivity and low-noise performances. The S5K2P1 also provides brighter and more vivid pictures even at night and dark indoor conditions.
According to market research firm TSR (Techno System Research), the digital still camera market is expected to reach 154 million units in 2012 where a substantial portion of up to 48.2 percent is forecast to be adoption of CMOS image sensors as the main sensor device.
Samsung’s S5K2P1 image sensor is currently sampling to select customers. Mass production for this imager is scheduled for November 2011.
This 16Mp resolution imager is designed for high-performance, advanced smartphones as well as digital still cameras and camcorders. Samsung unveiled its new imager technology, including the S5K2P1, at the eighth annual Samsung Mobile Solutions Forum held at the Westin Taipei.
“As the adoption rate of CMOS image sensors in the digital still camera market increases, market demand for imagers such as the S5K2P1, which provides clear and fast video, is expected to grow in 2012,” said Dojun Rhee, VP of System LSI marketing, Device Solutions, Samsung Electronics. “Introducing advanced high-resolution imagers based on BSI pixel technology supports further adoption of Samsung CMOS imagers to compact digital camera and camcorder applications.”
Samsung’s S5K2P1 is an image sensor optimized for compact mobile CE devices, with excellent image quality in video mode. Supporting multiple interfaces, this image sensor is also suited for premium smartphones. The S5K2P1 sensor supports a native 16:9 format video at up to 8.3Mp resolution at 60 frames per second and maximum 16 Megapixel-resolution for point-and-shoot images at 30 frames per second without shutter lag effect.
Using Samsung’s advanced 1.34um BSI pixel technology, the S5K2P1 delivers excellent sensitivity and low-noise performances. The S5K2P1 also provides brighter and more vivid pictures even at night and dark indoor conditions.
According to market research firm TSR (Techno System Research), the digital still camera market is expected to reach 154 million units in 2012 where a substantial portion of up to 48.2 percent is forecast to be adoption of CMOS image sensors as the main sensor device.
Samsung’s S5K2P1 image sensor is currently sampling to select customers. Mass production for this imager is scheduled for November 2011.
Samsung unveils high-performance application processor for smartphone and tablets
Samsung Mobile Solutions Forum 2011, TAIPEI, TAIWAN: Samsung Electronics Co. Ltd has introduced the latest addition to its Exynos product family – the Exynos 4212 - a dual core ARM Cortex-A9 application processor, designed on Samsung’s advanced 32nm High-K Metal Gate (HKMG) low-power process.
With best-in-class performance, the dual-core Exynos 4212 offers mobile device systems architects a new solution designed to support a high-quality user-experience and energy-efficient requirements of smartphones and tablet devices. Samsung’s new Exynos application processor is displayed at the eighth annual Samsung Mobile Solutions Forum held at the Westin Taipei.
“As innovative technologies appear on the mobile landscape, the market continues to embrace further developments and performance acceleration in mobile computing,” said Seh-Woong Jeong, executive VP of System LSI sales & marketing, Device Solutions, Samsung Electronics. “Samsung is addressing this trend with its powerful low-power Exynos family of processors based on its proven design technology and cutting-edge process technology for performance and power improvements at the system level.”
Leveraging its deep sub-micron expertise in high-performance/low-power technology, Samsung designed the Exynos 4212 on its 32nm low-power HKMG logic process technology with dual Cortex-A9 cores. Samsung’s 32nm HKMG process node is specifically tuned to offer a competitive, cutting-edge platform with double the logic density and a 30 percent lower power-level over the previous process generation.
In addition to the 25 percent increase in processing power, the new processor features an enhanced graphics processing unit (GPU) that is capable of delivering 50 percent higher 3D graphics performance over the previous processor generation from Samsung.
The Exynos 4212 incorporates a rich portfolio of advanced codec accelerators that support digital still images, video recording and play-back at 1080p full-HD resolution, an image signal processor and an on-chip HDMI 1.4 interface.
Samsung’s new Exynos 4212 application processor will be sampling to select customers in Q4 2011.
Samsung also launched a new website dedicated to its Exynos family of application processors. Designed to facilitate easy communication with industry partners and end users, the new micro site offers detailed product and event information as well as user experiences.
With best-in-class performance, the dual-core Exynos 4212 offers mobile device systems architects a new solution designed to support a high-quality user-experience and energy-efficient requirements of smartphones and tablet devices. Samsung’s new Exynos application processor is displayed at the eighth annual Samsung Mobile Solutions Forum held at the Westin Taipei.
“As innovative technologies appear on the mobile landscape, the market continues to embrace further developments and performance acceleration in mobile computing,” said Seh-Woong Jeong, executive VP of System LSI sales & marketing, Device Solutions, Samsung Electronics. “Samsung is addressing this trend with its powerful low-power Exynos family of processors based on its proven design technology and cutting-edge process technology for performance and power improvements at the system level.”
Leveraging its deep sub-micron expertise in high-performance/low-power technology, Samsung designed the Exynos 4212 on its 32nm low-power HKMG logic process technology with dual Cortex-A9 cores. Samsung’s 32nm HKMG process node is specifically tuned to offer a competitive, cutting-edge platform with double the logic density and a 30 percent lower power-level over the previous process generation.
In addition to the 25 percent increase in processing power, the new processor features an enhanced graphics processing unit (GPU) that is capable of delivering 50 percent higher 3D graphics performance over the previous processor generation from Samsung.
The Exynos 4212 incorporates a rich portfolio of advanced codec accelerators that support digital still images, video recording and play-back at 1080p full-HD resolution, an image signal processor and an on-chip HDMI 1.4 interface.
Samsung’s new Exynos 4212 application processor will be sampling to select customers in Q4 2011.
Samsung also launched a new website dedicated to its Exynos family of application processors. Designed to facilitate easy communication with industry partners and end users, the new micro site offers detailed product and event information as well as user experiences.
Samsung intros higher-performance 64-Gigabyte e-MMC NAND memory
Samsung Mobile Solutions Forum 2011, TAIPEI, TAIWAN: Samsung Electronics Co. Ltd has developed a high-performance 64-gigabyte (GB) embedded memory with 64Gb NAND for smartphones, tablets and other mobile devices, at the eighth annual Samsung Mobile Solutions Forum held at the Westin Taipei.
The new 64GB embedded multimedia card (e-MMC) provides the industry’s highest performance and thinnest profile available, utilizing Samsung’s leading-edge 64-gigabit (Gb) NAND with a toggle DDR 2.0 interface and the company’s latest 20 nanometer (nm) class* process technology.
“By starting production of the 64Gb-based 64GB e-MMC solution this year, we are accelerating the pace of adoption of premium embedded memory cards,” said Myung Ho Kim, VP, memory marketing, Device Solutions, Samsung Electronics. “As the memory technology leader, we will keep providing high-performance e-MMC products on an aggressive release schedule to meet the needs of leading mobile device providers for advanced mobile memory solutions.”
The 64GB e-MMC is being produced for high-end mobile devices in an extremely thin, eight-die stack, only 1.4 millimeters thick. It processes random write commands at 400 input/output operations per second (IOPS), which is quadruple the speed of many conventional e-MMC solutions made with 30nm-class* NAND flash memory chips.
The component features sequential read speeds of up to 80 megabytes per second (MB/s) and sequential write speeds of 40MB/s, a more than 3X improvement over high-end external mobile memory cards that now offer sequential speeds of 24MB/s and 12MB/s, respectively.
The 64GB e-MMC provides data storage space of up to 16,000 MP3 files in a single package that weighs only 0.6 grams.
Samsung provided its first 64GB e-MMC in January of 2010 using 30nm-class 32Gb NAND flash components, and late last year started producing 64GB eMMC with 20nm-class 32Gb NAND flash. The new eMMC utilizes the latest 20nm-class 64Gb NAND flash, which provides a 60 percent gain in productivity.
The new 64GB embedded multimedia card (e-MMC) provides the industry’s highest performance and thinnest profile available, utilizing Samsung’s leading-edge 64-gigabit (Gb) NAND with a toggle DDR 2.0 interface and the company’s latest 20 nanometer (nm) class* process technology.
“By starting production of the 64Gb-based 64GB e-MMC solution this year, we are accelerating the pace of adoption of premium embedded memory cards,” said Myung Ho Kim, VP, memory marketing, Device Solutions, Samsung Electronics. “As the memory technology leader, we will keep providing high-performance e-MMC products on an aggressive release schedule to meet the needs of leading mobile device providers for advanced mobile memory solutions.”
The 64GB e-MMC is being produced for high-end mobile devices in an extremely thin, eight-die stack, only 1.4 millimeters thick. It processes random write commands at 400 input/output operations per second (IOPS), which is quadruple the speed of many conventional e-MMC solutions made with 30nm-class* NAND flash memory chips.
The component features sequential read speeds of up to 80 megabytes per second (MB/s) and sequential write speeds of 40MB/s, a more than 3X improvement over high-end external mobile memory cards that now offer sequential speeds of 24MB/s and 12MB/s, respectively.
The 64GB e-MMC provides data storage space of up to 16,000 MP3 files in a single package that weighs only 0.6 grams.
Samsung provided its first 64GB e-MMC in January of 2010 using 30nm-class 32Gb NAND flash components, and late last year started producing 64GB eMMC with 20nm-class 32Gb NAND flash. The new eMMC utilizes the latest 20nm-class 64Gb NAND flash, which provides a 60 percent gain in productivity.
Samsung develops industry’s first LPDDR3 DRAM, using 30nm-class process technology
Samsung Mobile Solutions Forum 2011, TAIPEI, TAIWAN: Samsung Electronics Co. Ltd has developed the industry’s first monolithic four gigabit (Gb) LPDDR3 (low power double-data-rate 3) memory using 30 nanometer (nm) class technology for mobile applications such as smartphones and tablet PCs, at the eighth annual Samsung Mobile Solutions Forum held at the Westin Taipei. LPDDR3 DRAM is needed to support faster processors, high resolution displays and 3D graphics in high-end next generation mobile devices
“Samsung is offering the most advanced green mobile memory solution by developing the industry’s first 30nm-class 4Gb-based LPDDR3 packages,” said Wanhoon Hong, executive VP, memory sales & marketing, Device Solutions, Samsung Electronics. “Samsung will keep working closely with mobile device designers to deliver high-performance mobile solutions, while expanding the next-generation mobile memory market.”
The new 4Gb LPDDR3 DRAM can transfer data at up to 1,600 megabits per second (Mbps), which is approximately 1.5 times faster than the industry’s current highest performance LPDDR2, which operates at 1,066Mbps. The new component also consumes 20 percent less electrical power than its predecessor.
In addition, by stacking two 4Gb chips, Samsung is enabling use of a single 1GB LPDDR3 package, with a data transmission rate up to 12.8 gigabytes (GB) per second.
Starting next quarter, Samsung will begin sampling the 4Gb-based LPDDR3 chips to key mobile device providers. The chips are expected to be widely adopted next year in advanced mobile applications including next-generation smartphones and tablet PCs.
To accommodate the growing need for higher density mobile memory solutions to process large amount of data, the maximum amount of mobile DRAM in high-end mobile devices will grow from 1GB (8Gb) up to 2GB (16Gb) by early next year. These densities will be available by stacking four 4Gb LPDDR3 chips.
According to a research report from IHS iSuppli, the market for LPDDR3 DRAM will expand sharply starting in 2013. Samsung will be readying the market by mass producing more components in 2012 therein encouraging faster adoption of premium mobile DRAM solutions throughout the mobile electronics industry.
“Samsung is offering the most advanced green mobile memory solution by developing the industry’s first 30nm-class 4Gb-based LPDDR3 packages,” said Wanhoon Hong, executive VP, memory sales & marketing, Device Solutions, Samsung Electronics. “Samsung will keep working closely with mobile device designers to deliver high-performance mobile solutions, while expanding the next-generation mobile memory market.”
The new 4Gb LPDDR3 DRAM can transfer data at up to 1,600 megabits per second (Mbps), which is approximately 1.5 times faster than the industry’s current highest performance LPDDR2, which operates at 1,066Mbps. The new component also consumes 20 percent less electrical power than its predecessor.
In addition, by stacking two 4Gb chips, Samsung is enabling use of a single 1GB LPDDR3 package, with a data transmission rate up to 12.8 gigabytes (GB) per second.
Starting next quarter, Samsung will begin sampling the 4Gb-based LPDDR3 chips to key mobile device providers. The chips are expected to be widely adopted next year in advanced mobile applications including next-generation smartphones and tablet PCs.
To accommodate the growing need for higher density mobile memory solutions to process large amount of data, the maximum amount of mobile DRAM in high-end mobile devices will grow from 1GB (8Gb) up to 2GB (16Gb) by early next year. These densities will be available by stacking four 4Gb LPDDR3 chips.
According to a research report from IHS iSuppli, the market for LPDDR3 DRAM will expand sharply starting in 2013. Samsung will be readying the market by mass producing more components in 2012 therein encouraging faster adoption of premium mobile DRAM solutions throughout the mobile electronics industry.
Samsung promotes ‘smart and green experience’
Samsung Mobile Solutions Forum 2011, TAIPEI, TAIWAN: Samsung Electronics Co. Ltd held the eighth annual Samsung Mobile Solutions Forum at the Westin Taipei, where it launched several technologies and devices supporting the next wave of enhanced solutions for mobile applications. At the ‘Smart and Green Experience” event, Samsung also discussed future technology and business opportunities with industry executives.
Samsung underscored its mobile technology expertise at the event by introducing:
* a 32 nanometer (nm) dual-core application processor, Exynos 4212.
* an ultra high-speed LPDDR3 memory.
* advanced CMOS image sensor solutions, including
- a 1/8.2-inch 1.2 Megapixel (Mp) imager
- a 1/2.3-inch 16Mp high-sensitivity imager
- a 20nm-class high-performance eMMC embedded NAND solution.
This year, the company’s Smart and Green Experience theme highlighted the value of technological experience, as user interfaces and software have become driving forces in the rapidly growing mobile industry.
Enriching the user experience requires a proliferation of powerful and highly efficient hardware that can form an innovative platform of building blocks for next-generation interfaces and more sophisticated software.
In his welcome remarks commencing the conference, Dr. Oh-hyun Kwon, president of Device Solutions, Samsung Electronics, said: “The role of hardware solutions in improving system performance will continue to grow as the increased level of software sophistication and the introduction of new interfaces call for ever more powerful hardware components operating at minimal energy levels. Early development and timely market availability of next generation semiconductor technology in collaboration with industry partners, creates new market values and greater opportunities for customers and end users.”
Guest speakers Ludovic Blondel, director of Gameloft and Flint Pulskamp, research director of IDC, highlighted the morning program. Respectively, they spoke of enhancing the user experience with advanced mobile games to be played on future mobile environments, and new market opportunities in the continuing mobile evolution of intelligent systems and cloud services. The afternoon program was highlighted by sessions on key technology and products including application processors and memory technologies.
Samsung underscored its mobile technology expertise at the event by introducing:
* a 32 nanometer (nm) dual-core application processor, Exynos 4212.
* an ultra high-speed LPDDR3 memory.
* advanced CMOS image sensor solutions, including
- a 1/8.2-inch 1.2 Megapixel (Mp) imager
- a 1/2.3-inch 16Mp high-sensitivity imager
- a 20nm-class high-performance eMMC embedded NAND solution.
This year, the company’s Smart and Green Experience theme highlighted the value of technological experience, as user interfaces and software have become driving forces in the rapidly growing mobile industry.
Enriching the user experience requires a proliferation of powerful and highly efficient hardware that can form an innovative platform of building blocks for next-generation interfaces and more sophisticated software.
In his welcome remarks commencing the conference, Dr. Oh-hyun Kwon, president of Device Solutions, Samsung Electronics, said: “The role of hardware solutions in improving system performance will continue to grow as the increased level of software sophistication and the introduction of new interfaces call for ever more powerful hardware components operating at minimal energy levels. Early development and timely market availability of next generation semiconductor technology in collaboration with industry partners, creates new market values and greater opportunities for customers and end users.”
Guest speakers Ludovic Blondel, director of Gameloft and Flint Pulskamp, research director of IDC, highlighted the morning program. Respectively, they spoke of enhancing the user experience with advanced mobile games to be played on future mobile environments, and new market opportunities in the continuing mobile evolution of intelligent systems and cloud services. The afternoon program was highlighted by sessions on key technology and products including application processors and memory technologies.
Accel-RF announces collaboration with leading universities research on GaN semiconductors
SAN DIEGO, USA: Accel-RF Corp. has announced collaboration with leading universities in the area of high frequency Gallium Nitride technology.
The collaboration between the universities and Accel-RF is in the form of Accel-RF providing industry leading RF equipment, software, and other services for Reliability Testing and Characterization of compound semiconductor devices such as Gallium Nitride. The goal of the collaborations is for the professors and their research teams to use these available resources for groundbreaking research in the area of compound semiconductor RF Physics, Reliability prediction, and test method improvement.
“Accel-RF is pleased to support our participating universities by providing leading edge reliability test equipment to a team of researchers,” says Roland Shaw, president and founder of Accel-RF. “Our equipment, software and support engineering services allow researchers and manufacturers to collect in-situ performance degradation data on RF/Microwave devices, and use that data to move forward the understanding of reliability drivers in advanced semiconductor technologies”, adds Shaw. Announcement of Accel-RF’s university collaboration program bolsters the company’s Co-operative Research and Development Agreement (CRADA) with the Air Force Research Laboratory announced in August of last year.
“The relationship between Accel-RF and our academic partners has and continues to be a win-win situation. The work already completed has born insights to development of more rugged GaN transistor technology that can be deployed in many applications throughout the semiconductor industry,” concludes Shaw.
The collaboration between the universities and Accel-RF is in the form of Accel-RF providing industry leading RF equipment, software, and other services for Reliability Testing and Characterization of compound semiconductor devices such as Gallium Nitride. The goal of the collaborations is for the professors and their research teams to use these available resources for groundbreaking research in the area of compound semiconductor RF Physics, Reliability prediction, and test method improvement.
“Accel-RF is pleased to support our participating universities by providing leading edge reliability test equipment to a team of researchers,” says Roland Shaw, president and founder of Accel-RF. “Our equipment, software and support engineering services allow researchers and manufacturers to collect in-situ performance degradation data on RF/Microwave devices, and use that data to move forward the understanding of reliability drivers in advanced semiconductor technologies”, adds Shaw. Announcement of Accel-RF’s university collaboration program bolsters the company’s Co-operative Research and Development Agreement (CRADA) with the Air Force Research Laboratory announced in August of last year.
“The relationship between Accel-RF and our academic partners has and continues to be a win-win situation. The work already completed has born insights to development of more rugged GaN transistor technology that can be deployed in many applications throughout the semiconductor industry,” concludes Shaw.
Wednesday, September 28, 2011
ATREG appoints international advisory board
SEATTLE, USA: ATREG (Advanced Technology Resource Group), a Seattle-based global advisory firm to the semiconductor industry, announced that one year after becoming a successful independent entity, it has appointed an international advisory board made of five high-profile executives and influencers from North America, Europe, and Asia who have previously helped lead major global semiconductor organizations. Newly appointed advisory board members will help steer ATREG’s future growth and business direction by providing support across the full spectrum of ATREG’s business activities. ATREG is pleased to welcome to its international advisory board:
• Hideto Goto, senior advisor, ASE Japan, Inc. / management advisor, Unison Capital, Inc. (formerly managing director, NEC Semiconductors UK, and board member / executive vice president, NEC Electronics).
• Allen Lu, president, SEMI China (formerly China fab program manager, Intel Technology Manufacturing and Engineering Group).
• Werner Mohr, senior advisor / consultant (formerly head of manufacturing engineering, semiconductor division, Siemens AG, and head of corporate logic, Infineon Technologies AG).
• Jack Saltich, senior semiconductor business and technology executive (formerly VP and GM of Advanced Micro Devices’ Dresden European Electronics Center).
• David Smukowski, CEO, Sensors in Motion (formerly managing director, Boeing Ventures).
“I am pleased about the opportunity to join ATREG in an advisory capacity,” explains Hideto Goto. “As the most trusted global advisory firm with $5 billion in sales in the past 10 years, ATREG brings the creative thinking and expertise global semiconductor companies need to explore new, innovative strategies with regards to the repurposing of their operational fab assets, so they can best capitalize on their global manufacturing investments.”
“After a year establishing ATREG as an independent advisory firm, we are ready to take the company to the next level, and the appointment of this international advisory board is a natural progression in our development to help us successfully achieve our objectives,” adds Stephen Rothrock, president and managing principal at ATREG. “We are pleased to welcome the brightest mentors from the four corners of the globe, and look forward to leveraging their wisdom, experience, independent perspectives, and objective analysis to ensure ATREG’s future growth and capitalize on new demand in the global semiconductor marketplace.”
• Hideto Goto, senior advisor, ASE Japan, Inc. / management advisor, Unison Capital, Inc. (formerly managing director, NEC Semiconductors UK, and board member / executive vice president, NEC Electronics).
• Allen Lu, president, SEMI China (formerly China fab program manager, Intel Technology Manufacturing and Engineering Group).
• Werner Mohr, senior advisor / consultant (formerly head of manufacturing engineering, semiconductor division, Siemens AG, and head of corporate logic, Infineon Technologies AG).
• Jack Saltich, senior semiconductor business and technology executive (formerly VP and GM of Advanced Micro Devices’ Dresden European Electronics Center).
• David Smukowski, CEO, Sensors in Motion (formerly managing director, Boeing Ventures).
“I am pleased about the opportunity to join ATREG in an advisory capacity,” explains Hideto Goto. “As the most trusted global advisory firm with $5 billion in sales in the past 10 years, ATREG brings the creative thinking and expertise global semiconductor companies need to explore new, innovative strategies with regards to the repurposing of their operational fab assets, so they can best capitalize on their global manufacturing investments.”
“After a year establishing ATREG as an independent advisory firm, we are ready to take the company to the next level, and the appointment of this international advisory board is a natural progression in our development to help us successfully achieve our objectives,” adds Stephen Rothrock, president and managing principal at ATREG. “We are pleased to welcome the brightest mentors from the four corners of the globe, and look forward to leveraging their wisdom, experience, independent perspectives, and objective analysis to ensure ATREG’s future growth and capitalize on new demand in the global semiconductor marketplace.”
Touchstone Semiconductor extends free demo board program through Dec. 31
MILPITAS, USA: Touchstone Semiconductor, a developer of high-performance analog integrated circuit solutions, will extend its free demo board program through Dec. 31.
The offer includes all demo boards in Touchstone’s growing portfolio of high-performance analog products, including the groundbreaking 0.8V, 0.6μA TS1001 operational amplifier, and the new TS9001-1 and TS9001-2 ultra low-power voltage monitor ICs.
“We have had an outstanding response to our free demo board program,” said Adolfo Garcia, vice president, Applications and Marketing, Touchstone Semiconductor. “Engineers love how simple and easy to use our demo boards are to use.”
Every demo board Touchstone makes is designed for simple set up and easy analysis. Users just connect a power supply, and easily observe the performance of the Touchstone part.
TS1001 low-power op amp demo board
The TS1001 demo board provides both non-inverting and inverting configurations. The TS1001 op amp is the first and only single-supply operational amplifier to cut power requirements at least in half compared to any other amplifier. The TS1001 is fully specified to operate on a 0.8V supply while consuming less than 0.6μA supply current.
TS9001 low-power voltage monitor demo board
The TS9001 demo board contains the push-pull TS9001-1 and the open-drain TS9001-2. Each circuit is configured as a simple threshold detector with additional hysteresis. The TS9001-1 and the TS9001-2 voltage monitor ICs incorporate a +1.252V reference with a 1% initial accuracy.
The TS9001-1 offers a robust push-pull output stage with increased output current drive while the TS9001-2 offers an open-drain output stage that can be used in mixed-voltage systems design. Both TS9001s are fully specified to operate from +1.6V to 5.5V supplies while consuming less than 0.65μA supply current.
The offer includes all demo boards in Touchstone’s growing portfolio of high-performance analog products, including the groundbreaking 0.8V, 0.6μA TS1001 operational amplifier, and the new TS9001-1 and TS9001-2 ultra low-power voltage monitor ICs.
“We have had an outstanding response to our free demo board program,” said Adolfo Garcia, vice president, Applications and Marketing, Touchstone Semiconductor. “Engineers love how simple and easy to use our demo boards are to use.”
Every demo board Touchstone makes is designed for simple set up and easy analysis. Users just connect a power supply, and easily observe the performance of the Touchstone part.
TS1001 low-power op amp demo board
The TS1001 demo board provides both non-inverting and inverting configurations. The TS1001 op amp is the first and only single-supply operational amplifier to cut power requirements at least in half compared to any other amplifier. The TS1001 is fully specified to operate on a 0.8V supply while consuming less than 0.6μA supply current.
TS9001 low-power voltage monitor demo board
The TS9001 demo board contains the push-pull TS9001-1 and the open-drain TS9001-2. Each circuit is configured as a simple threshold detector with additional hysteresis. The TS9001-1 and the TS9001-2 voltage monitor ICs incorporate a +1.252V reference with a 1% initial accuracy.
The TS9001-1 offers a robust push-pull output stage with increased output current drive while the TS9001-2 offers an open-drain output stage that can be used in mixed-voltage systems design. Both TS9001s are fully specified to operate from +1.6V to 5.5V supplies while consuming less than 0.65μA supply current.
ST and Fraunhofer Heinrich Hertz Institute demo world's first standard-based 3D adaptive video-streaming software receiver
TORINO, ITALY: STMicroelectronics and Fraunhofer Heinrich Hertz Institute (HHI), a leading research center for communication systems, digital media and services, have unveiled the industry's first 3D video receiver based on the new MPEG-DASH standard for dynamic and adaptive HTTP streaming. The fully working prototype developed within the EU-funded COAST (Content Aware Searching and Streaming) project is being demonstrated at the Networked and Electronic Media (NEM) Summit in Torino, Italy on 27-29 September 2011.
HTTP streaming enables high-quality video delivery over IP to connected TV sets, set-top boxes and mobile terminals. Recently released by the 3GPP and MPEG groups, Dynamic Adaptive Streaming over HTTP (DASH) aims to simplify the deployment of broadband video streaming services across different network infrastructures and end devices, replacing the multitude of proprietary HTTP streaming protocols with one open, standardized solution.
DASH defines formats for content preparation and tools for fast and efficient content adaptation. It supports trick modes, multi-language subtitles and audio tracks, ad insertion and multiple digital rights management technologies aimed at protecting content, and works with standard web-server and cache technologies.
The ST-HHI DASH-based software video receiver uses sophisticated algorithms to guarantee uninterrupted video delivery and optimal viewing experiences through automatic selection of bit-rate, video resolution and format based on the actual network conditions, end-device capabilities and user preferences.
Bandwidth fluctuations are compensated for by automatic variation of the video bit-rate while the video format is automatically selected according to the type of terminal, so that consumers are able to watch the same 3D content on standard 2D-display devices.
On show at the 2011 NEM Summit, the ST-HHI 3D adaptive streaming environment comprises a video server, a PC connected to a 3D monitor, and a thin client with 2D display. The 3D video content is generated and delivered over IP from a remote server to both terminals, while the same 3D video flow is automatically adapted to 2D in the thin client. The prototype implements the DASH technology in GStreamer, a popular multimedia framework for PC and embedded platforms that supports a wide range of media formats and streaming protocols.
"DASH enables efficient and easy video delivery – both on-demand and live streaming - over the existing Internet infrastructure to any connected device without any special provisions," said Amedeo Zuccaro, director, Security & Multimedia System R&D, ST's Advanced Systems Technology Group. "Through our collaboration with HHI, we are the first silicon manufacturer with native support for DASH-based adaptive video streaming integrated in our devices."
"3D video technology left the labs and niches, hit the market and is now available for everyone," said Dr.-Ing. Thomas Schierl, head of Fraunhofer HHI's Multimedia Communications Group. "We are happy to be collaborating with ST to prepare the next generation of devices for the delivery of stereoscopic and multiview video content."
Networked and Electronic Media (NEM) is a European industrial initiative focused on the convergence of media, communications, consumer electronics and IT. 4th NEM Summit, which takes place in Torino, Italy, on 27-29 September 2011, gathers representatives from the networked and electronic media in Europe and worldwide, including corporations, SMEs and start-ups, research centers and institutions, industry associations and groups and standardization bodies.
HTTP streaming enables high-quality video delivery over IP to connected TV sets, set-top boxes and mobile terminals. Recently released by the 3GPP and MPEG groups, Dynamic Adaptive Streaming over HTTP (DASH) aims to simplify the deployment of broadband video streaming services across different network infrastructures and end devices, replacing the multitude of proprietary HTTP streaming protocols with one open, standardized solution.
DASH defines formats for content preparation and tools for fast and efficient content adaptation. It supports trick modes, multi-language subtitles and audio tracks, ad insertion and multiple digital rights management technologies aimed at protecting content, and works with standard web-server and cache technologies.
The ST-HHI DASH-based software video receiver uses sophisticated algorithms to guarantee uninterrupted video delivery and optimal viewing experiences through automatic selection of bit-rate, video resolution and format based on the actual network conditions, end-device capabilities and user preferences.
Bandwidth fluctuations are compensated for by automatic variation of the video bit-rate while the video format is automatically selected according to the type of terminal, so that consumers are able to watch the same 3D content on standard 2D-display devices.
On show at the 2011 NEM Summit, the ST-HHI 3D adaptive streaming environment comprises a video server, a PC connected to a 3D monitor, and a thin client with 2D display. The 3D video content is generated and delivered over IP from a remote server to both terminals, while the same 3D video flow is automatically adapted to 2D in the thin client. The prototype implements the DASH technology in GStreamer, a popular multimedia framework for PC and embedded platforms that supports a wide range of media formats and streaming protocols.
"DASH enables efficient and easy video delivery – both on-demand and live streaming - over the existing Internet infrastructure to any connected device without any special provisions," said Amedeo Zuccaro, director, Security & Multimedia System R&D, ST's Advanced Systems Technology Group. "Through our collaboration with HHI, we are the first silicon manufacturer with native support for DASH-based adaptive video streaming integrated in our devices."
"3D video technology left the labs and niches, hit the market and is now available for everyone," said Dr.-Ing. Thomas Schierl, head of Fraunhofer HHI's Multimedia Communications Group. "We are happy to be collaborating with ST to prepare the next generation of devices for the delivery of stereoscopic and multiview video content."
Networked and Electronic Media (NEM) is a European industrial initiative focused on the convergence of media, communications, consumer electronics and IT. 4th NEM Summit, which takes place in Torino, Italy, on 27-29 September 2011, gathers representatives from the networked and electronic media in Europe and worldwide, including corporations, SMEs and start-ups, research centers and institutions, industry associations and groups and standardization bodies.
TI partner intros industry's first point-of-sale reference design with PCI compliance and NFC capability
DALLAS, USA: Designers in the retail electronic transaction space can now quickly and easily develop cutting-edge portable point-of-sale applications that incorporate secure payment card processing including contactless near field communications (NFC) capabilities.
This new, low-cost, turnkey electronic point-of-sale (EPOS) solution from ViewAt, a Texas Instruments Incorporated (TI) (NYSE: TXN) partner, protects intellectual property and financial transactions while reducing development time for these latest retail transaction products by as much as a year. Following a modular design approach, the EPOS solution provides flexibility to customers seeking to differentiate products including:
* Countertop payment terminal.
* Mobile payment terminal with wireless support.
* Handheld data terminals with barcode scanning.
* Full kiosk with barcode scanning, payment and wireless support.
Complete EPOS solution offers integrated features, security, NFC and design flexibility
Performance and integration, including 1 GHz of fast performance with TI's AM3715 ARM Cortex-A8 microprocessor, to enable fluid, seamless graphics and applications with the integrated, interactive touch screen. The solution also integrates a printer, Ethernet, cellular support and mobile connectivity (Bluetooth and Wi-Fi technologies).
NFC capabilities provided by TI's TRF7970A analog front-end (AFE) transceiver expand the electronic transaction potential with increased wireless connection options for transaction speed and accuracy while reducing staffing requirements.
Security protects intellectual property and financial transactions. The EPOS reference design incorporates a third-party hardware security controller for secure boot and tamper protection. Software development for financial transaction security saves developers as much as a year of time by offering pre-evaluation for Payment Card Industry (PCI) Personal Identification Number (PIN) Transaction Security (PTS) standards through a PCI-accredited lab. This pre-evaluation by RFI Global in the United Kingdom enables software developers to obtain PCI-certification quickly and get their products to market faster.
A full complement of TI signal chain, power management, ESD protection and logic devices to support functions like audio, battery charging, motor and touch-screen control.
Popular operating system support leverages existing software code and expertise, further reducing time to market. Systems include Linux, Android and Windows Compact Embedded.
Feature additions enable further product differentiation and are easy with other pin-to-pin and software-compatible TI devices (i.e., adding video with a TI DaVinci digital media processor).
This new, low-cost, turnkey electronic point-of-sale (EPOS) solution from ViewAt, a Texas Instruments Incorporated (TI) (NYSE: TXN) partner, protects intellectual property and financial transactions while reducing development time for these latest retail transaction products by as much as a year. Following a modular design approach, the EPOS solution provides flexibility to customers seeking to differentiate products including:
* Countertop payment terminal.
* Mobile payment terminal with wireless support.
* Handheld data terminals with barcode scanning.
* Full kiosk with barcode scanning, payment and wireless support.
Complete EPOS solution offers integrated features, security, NFC and design flexibility
Performance and integration, including 1 GHz of fast performance with TI's AM3715 ARM Cortex-A8 microprocessor, to enable fluid, seamless graphics and applications with the integrated, interactive touch screen. The solution also integrates a printer, Ethernet, cellular support and mobile connectivity (Bluetooth and Wi-Fi technologies).
NFC capabilities provided by TI's TRF7970A analog front-end (AFE) transceiver expand the electronic transaction potential with increased wireless connection options for transaction speed and accuracy while reducing staffing requirements.
Security protects intellectual property and financial transactions. The EPOS reference design incorporates a third-party hardware security controller for secure boot and tamper protection. Software development for financial transaction security saves developers as much as a year of time by offering pre-evaluation for Payment Card Industry (PCI) Personal Identification Number (PIN) Transaction Security (PTS) standards through a PCI-accredited lab. This pre-evaluation by RFI Global in the United Kingdom enables software developers to obtain PCI-certification quickly and get their products to market faster.
A full complement of TI signal chain, power management, ESD protection and logic devices to support functions like audio, battery charging, motor and touch-screen control.
Popular operating system support leverages existing software code and expertise, further reducing time to market. Systems include Linux, Android and Windows Compact Embedded.
Feature additions enable further product differentiation and are easy with other pin-to-pin and software-compatible TI devices (i.e., adding video with a TI DaVinci digital media processor).
Intel gains MPU share on strength of PC sales and Sandy Bridge success
EL SEGUNDO, USA: Aided by a recovery in the PC market and by strong shipments of its new Sandy Bridge chips, Intel Corp. in the second quarter expanded its lead in the global microprocessor market compared to a year earlier, according to the latest IHS iSuppli Computer Systems research.
Intel in the second quarter accounted for 81.8 percent of global microprocessor revenue, up 1.1 percentage points from 80.7 percent in the second quarter of 2010. Chief Intel rival Advanced Micro Devices Inc. (AMD) suffered a corresponding 1.1 percentage point decrease in share during the same period.
The figure presents the IHS ranking of leading microprocessor suppliers in the second quarter of 2011. The market share numbers presented in the tables and this release include revenue for the entire global microprocessor market, including X86, RISC, and other types of general-purpose microprocessors. The data is not limited to the X86 chips used in the PC market, although these types of devices represent the vast majority of shipments.
Source: IHS iSuppli, USA.
“Intel in the second quarter benefited from the combination of a recovery in PC demand and strong shipment growth for its new Sandy Bridge line of microprocessors,” said Matthew Wilkins, principal analyst for compute platforms research at IHS. “Strong corporate PC sales were particularly beneficial to Intel, as the enterprise computing segment has been outperforming the consumer market.”
PC recovery fuels rebound in microprocessor sales
After contracting on a sequential and annual basis during the first three months of the year, the global PC market returned to growth in the second quarter, with total shipments of 85.6 million units, up 3.7 percent from 82.6 million during the same period in 2010.
This contributed to a 10 percent year-over-year leap in global microprocessor revenue in the second quarter. Global microprocessor revenue in the second quarter of 2011 amounted to $10.8 billion, up from $9.8 billion the same time a year ago.
PC sales were propelled by strong demand from corporate information technology (IT) departments, which now are engaging in efforts to refresh their hardware. In contrast, consumer PC demand was weak because of rising competition from tablets and due to increasing economic concerns. This benefited Intel, which derives a greater proportion of its microprocessor revenues from the corporate market.
Sandy Bridge provides bridge to growth
Meanwhile, Intel also aggressively increased production of its Sandy Bridge line of microprocessors, helping to expand its market share. The company described its production increases for the microprocessor as the fastest ramp-up of any product in the company’s history.
The Sandy Bridge line integrates graphics as part of the processor package, and is targeted at corporate and consumer markets across desktop and notebook PC platforms.
AMD performs better sequentially
While Intel was the star of the microprocessor market on a year-over-year basis, AMD’s second-quarter performance appears better when using a sequential comparison.
AMD’s share of the microprocessor revenue in the second quarter rose to 10.4 percent, up 0.3 percent from 10.1 percent in the first quarter. This compares to Intel’s 0.7 percentage point decline from 82.6 percent in the first quarter.
AMD’s strong increase in shipments of its Fusion microprocessors helped the company to halt the sequential decrease in shipments that it has suffered for the last three quarters.
“AMDs results were powered up by Fusion microprocessors, which delivers improved computational performance. It also provides PCs with DirectX 11 graphics capability without the need for a discrete graphics card,” Wilkins said.
Source: IHS iSuppli, USA.
Intel in the second quarter accounted for 81.8 percent of global microprocessor revenue, up 1.1 percentage points from 80.7 percent in the second quarter of 2010. Chief Intel rival Advanced Micro Devices Inc. (AMD) suffered a corresponding 1.1 percentage point decrease in share during the same period.
The figure presents the IHS ranking of leading microprocessor suppliers in the second quarter of 2011. The market share numbers presented in the tables and this release include revenue for the entire global microprocessor market, including X86, RISC, and other types of general-purpose microprocessors. The data is not limited to the X86 chips used in the PC market, although these types of devices represent the vast majority of shipments.
Source: IHS iSuppli, USA.“Intel in the second quarter benefited from the combination of a recovery in PC demand and strong shipment growth for its new Sandy Bridge line of microprocessors,” said Matthew Wilkins, principal analyst for compute platforms research at IHS. “Strong corporate PC sales were particularly beneficial to Intel, as the enterprise computing segment has been outperforming the consumer market.”
PC recovery fuels rebound in microprocessor sales
After contracting on a sequential and annual basis during the first three months of the year, the global PC market returned to growth in the second quarter, with total shipments of 85.6 million units, up 3.7 percent from 82.6 million during the same period in 2010.
This contributed to a 10 percent year-over-year leap in global microprocessor revenue in the second quarter. Global microprocessor revenue in the second quarter of 2011 amounted to $10.8 billion, up from $9.8 billion the same time a year ago.
PC sales were propelled by strong demand from corporate information technology (IT) departments, which now are engaging in efforts to refresh their hardware. In contrast, consumer PC demand was weak because of rising competition from tablets and due to increasing economic concerns. This benefited Intel, which derives a greater proportion of its microprocessor revenues from the corporate market.
Sandy Bridge provides bridge to growth
Meanwhile, Intel also aggressively increased production of its Sandy Bridge line of microprocessors, helping to expand its market share. The company described its production increases for the microprocessor as the fastest ramp-up of any product in the company’s history.
The Sandy Bridge line integrates graphics as part of the processor package, and is targeted at corporate and consumer markets across desktop and notebook PC platforms.
AMD performs better sequentially
While Intel was the star of the microprocessor market on a year-over-year basis, AMD’s second-quarter performance appears better when using a sequential comparison.
AMD’s share of the microprocessor revenue in the second quarter rose to 10.4 percent, up 0.3 percent from 10.1 percent in the first quarter. This compares to Intel’s 0.7 percentage point decline from 82.6 percent in the first quarter.
AMD’s strong increase in shipments of its Fusion microprocessors helped the company to halt the sequential decrease in shipments that it has suffered for the last three quarters.
“AMDs results were powered up by Fusion microprocessors, which delivers improved computational performance. It also provides PCs with DirectX 11 graphics capability without the need for a discrete graphics card,” Wilkins said.
Source: IHS iSuppli, USA.
Synopsys' CODE V enhances analysis of precision optical systems
MOUNTAIN VIEW, USA: Synopsys Inc. announced the availability of enhancements to its CODE V optical design and analysis software, acquired as part of Synopsys' acquisition of Optical Research Associates (ORA).
CODE V 10.4 delivers enhancements to its Beam Synthesis Propagation (BSP) tool that enable optical designers to model and analyze diffraction effects in an optical system with increased flexibility, speed and accuracy. These enhancements are particularly useful for evaluating the performance of optical designs with stringent accuracy requirements, such as microlithography lenses, laser scanning systems and optical telecommunication devices.
BSP uses a unique, beamlet-based algorithm to produce a physically accurate model of the wave nature of light as it travels through an optical system. It accounts for aberrations and diffraction effects (interference), including the impact of aperture clipping and apodizing filters. BSP enables designers to have a full understanding of how diffraction impacts key system performance measures by providing high-accuracy computations of the optical beam intensity, amplitude and phase characteristics.
Another unique capability of BSP is its pre-analysis feature, which recommends analysis parameters customized for the user's lens system, helping to minimize analysis setup time and deliver the answers designers need for system validation.
"With the CODE V 10.4 release, we continue to focus on providing our customers with features to help them design high-performance, manufacturable optical systems," said George Bayz, VP and GM, Optical Solutions Group at Synopsys. "BSP sets an industry standard for beam propagation analysis with its efficient, accurate calculations, ease of use and ability to deliver answers that closely match as-built results."
"BSP is an exceptional tool for analyzing systems with complex optics, such as laser beam delivery systems," said John Tamkin, CEO and CTO of Imaging Insights LLC. "The pre-analysis feature removes guesswork and hand calculations sometimes necessary to set up complex sampling grids that can vary throughout an optical system. We have successfully used BSP to analyze retinal laser safety metrics for ophthalmic surgery applications and to accurately model the impact of mid-spatial optical surface irregularities on the performance of precision optical systems."
BSP general complex field input
CODE V 10.4 adds support for general complex field input to BSP. This gives users flexibility to customize the input beam (light source) description by providing detailed maps of the beam's intensity and phase. For example, complex optical field data can be imported from external software programs that model waveguides for photonic devices. This feature also allows the definition and propagation of higher-order laser modes.
BSP birefringent crystal modeling
BSP has been extended to model extraordinary ray propagation through uniaxial, birefringent crystals. This enhances BSP's ability to accurately model beam propagation through devices that manipulate the polarization of light, including optical telecommunication devices and lithography lenses.
BSP pre-analysis enhancements
The BSP pre-analysis feature, which determines recommended sampling, resampling and other BSP analysis settings based on the user's lens system configuration and required output, is now more robust when used with systems having a Gaussian input field followed by small collimation elements, a common configuration in many optical telecommunication devices.
BSP multiprocessor support
BSP now takes advantage of parallel processing on multi-core architecture CPUs, enabling designers to obtain BSP analysis results in a fraction of the time needed when using a single processor.
Glass Expert tool
Now fully integrated into CODE V, the Glass Expert tool uses a unique algorithm to find the best set of real glasses for a user's lens design that provides superior color correction (including the generation of apochromatic systems) while considering factors such as glass transmission, cost, weight and other criteria. The result is a practical, final set of glasses that eliminates the need for time-intensive glass selection.
The CODE V 10.4 release is available now.
CODE V 10.4 delivers enhancements to its Beam Synthesis Propagation (BSP) tool that enable optical designers to model and analyze diffraction effects in an optical system with increased flexibility, speed and accuracy. These enhancements are particularly useful for evaluating the performance of optical designs with stringent accuracy requirements, such as microlithography lenses, laser scanning systems and optical telecommunication devices.
BSP uses a unique, beamlet-based algorithm to produce a physically accurate model of the wave nature of light as it travels through an optical system. It accounts for aberrations and diffraction effects (interference), including the impact of aperture clipping and apodizing filters. BSP enables designers to have a full understanding of how diffraction impacts key system performance measures by providing high-accuracy computations of the optical beam intensity, amplitude and phase characteristics.
Another unique capability of BSP is its pre-analysis feature, which recommends analysis parameters customized for the user's lens system, helping to minimize analysis setup time and deliver the answers designers need for system validation.
"With the CODE V 10.4 release, we continue to focus on providing our customers with features to help them design high-performance, manufacturable optical systems," said George Bayz, VP and GM, Optical Solutions Group at Synopsys. "BSP sets an industry standard for beam propagation analysis with its efficient, accurate calculations, ease of use and ability to deliver answers that closely match as-built results."
"BSP is an exceptional tool for analyzing systems with complex optics, such as laser beam delivery systems," said John Tamkin, CEO and CTO of Imaging Insights LLC. "The pre-analysis feature removes guesswork and hand calculations sometimes necessary to set up complex sampling grids that can vary throughout an optical system. We have successfully used BSP to analyze retinal laser safety metrics for ophthalmic surgery applications and to accurately model the impact of mid-spatial optical surface irregularities on the performance of precision optical systems."
BSP general complex field input
CODE V 10.4 adds support for general complex field input to BSP. This gives users flexibility to customize the input beam (light source) description by providing detailed maps of the beam's intensity and phase. For example, complex optical field data can be imported from external software programs that model waveguides for photonic devices. This feature also allows the definition and propagation of higher-order laser modes.
BSP birefringent crystal modeling
BSP has been extended to model extraordinary ray propagation through uniaxial, birefringent crystals. This enhances BSP's ability to accurately model beam propagation through devices that manipulate the polarization of light, including optical telecommunication devices and lithography lenses.
BSP pre-analysis enhancements
The BSP pre-analysis feature, which determines recommended sampling, resampling and other BSP analysis settings based on the user's lens system configuration and required output, is now more robust when used with systems having a Gaussian input field followed by small collimation elements, a common configuration in many optical telecommunication devices.
BSP multiprocessor support
BSP now takes advantage of parallel processing on multi-core architecture CPUs, enabling designers to obtain BSP analysis results in a fraction of the time needed when using a single processor.
Glass Expert tool
Now fully integrated into CODE V, the Glass Expert tool uses a unique algorithm to find the best set of real glasses for a user's lens design that provides superior color correction (including the generation of apochromatic systems) while considering factors such as glass transmission, cost, weight and other criteria. The result is a practical, final set of glasses that eliminates the need for time-intensive glass selection.
The CODE V 10.4 release is available now.
Open-Silicon licenses broad range of ARM technology to develop low-power networking, telecom, storage and computing SoCs
CAMBRIDGE, UK & MILPITAS, USA: ARM and Open-Silicon Inc. have signed a comprehensive multi-year licensing agreement for a broad portfolio of ARM technology. This includes ARM Cortex processors and associated ARM Processor Optimization Packs (POPs), ARM Mali Graphics Processing Units (GPUs) and ARM system IP. The latter includes ARM CoreLink interconnect and CoreSight debug and trace technology.
The agreement enables Open Silicon to offer customers a ‘one-stop-shop’ where access to the latest ARM technology is complemented by the provision of SoC design, hardening, prototyping, software development and manufacturing services. Open-Silicon will use ARM technology to provide complete design and development services for low-power chip solutions focusing on the networking, telecommunications, storage and computing markets.
The combination of Open-Silicon’s SoC development capabilities and design experience with ARM technology will enable customers to benefit from a faster time to market and result in a more optimal solution. Open-Silicon’s architects can assist customers with architectural development using performance vs workload analysis, factoring in throughput and latency criteria to optimize peripheral IP selection. In addition, system security requirements for the protection of high-value data can be met through the careful application of ARM TrustZone technology. Finally, Open-Silicon’s FPGA-based prototyping environments help software teams to engage early, accelerating system development and reducing program risk.
To optimize silicon implementation, Open-Silicon can access ARM Processor Optimization Packs (POPs) for Cortex processors, allowing customers to achieve leading performance implementations in a matter of weeks. Open-Silicon will further enhance customers’ results with its patented CoreMAX technology. When combined with Open-Silicon’s low-power solutions, including PowerMAX and VariMAX back biasing, CoreMAX allows customers to achieve market-differentiating performance and power efficiency.
“Having access to this broad portfolio of ARM IP will allow our systems architects to model various architectures and develop the best solutions for each customer. Open-Silicon’s goal is to provide solutions that enable our customers to get to market quickly with the best technology available,” said Dr. Naveed Sherwani, president and CEO of Open-Silicon. “As the demand for low-power products continues to drive the marketplace we believe our customers will benefit significantly from the combination of our first class design services and the latest ARM technology.”
As an ARM Partner, Open-Silicon is also part of the ARM Connected Community, a global network of over 850 companies with access to a wide variety of resources and aligned to provide optimized solutions based on the ARM architecture.
“The strength of the ARM Partner ecosystem is based on rapid innovation, diversity and complimentary services. Open-Silicon’s experience in delivering ARM processor-based SoC solutions provides customers with a valuable service,” commented Lance Howarth, executive VP of Marketing, ARM. “We are excited to work alongside Open-Silicon as they focus on a complete design service. The agreement paves the way for increased adoption of ARM architecture across a wide range of end markets, such as the use of Cortex-A5 processor in home gateway solutions.”
The agreement enables Open Silicon to offer customers a ‘one-stop-shop’ where access to the latest ARM technology is complemented by the provision of SoC design, hardening, prototyping, software development and manufacturing services. Open-Silicon will use ARM technology to provide complete design and development services for low-power chip solutions focusing on the networking, telecommunications, storage and computing markets.
The combination of Open-Silicon’s SoC development capabilities and design experience with ARM technology will enable customers to benefit from a faster time to market and result in a more optimal solution. Open-Silicon’s architects can assist customers with architectural development using performance vs workload analysis, factoring in throughput and latency criteria to optimize peripheral IP selection. In addition, system security requirements for the protection of high-value data can be met through the careful application of ARM TrustZone technology. Finally, Open-Silicon’s FPGA-based prototyping environments help software teams to engage early, accelerating system development and reducing program risk.
To optimize silicon implementation, Open-Silicon can access ARM Processor Optimization Packs (POPs) for Cortex processors, allowing customers to achieve leading performance implementations in a matter of weeks. Open-Silicon will further enhance customers’ results with its patented CoreMAX technology. When combined with Open-Silicon’s low-power solutions, including PowerMAX and VariMAX back biasing, CoreMAX allows customers to achieve market-differentiating performance and power efficiency.
“Having access to this broad portfolio of ARM IP will allow our systems architects to model various architectures and develop the best solutions for each customer. Open-Silicon’s goal is to provide solutions that enable our customers to get to market quickly with the best technology available,” said Dr. Naveed Sherwani, president and CEO of Open-Silicon. “As the demand for low-power products continues to drive the marketplace we believe our customers will benefit significantly from the combination of our first class design services and the latest ARM technology.”
As an ARM Partner, Open-Silicon is also part of the ARM Connected Community, a global network of over 850 companies with access to a wide variety of resources and aligned to provide optimized solutions based on the ARM architecture.
“The strength of the ARM Partner ecosystem is based on rapid innovation, diversity and complimentary services. Open-Silicon’s experience in delivering ARM processor-based SoC solutions provides customers with a valuable service,” commented Lance Howarth, executive VP of Marketing, ARM. “We are excited to work alongside Open-Silicon as they focus on a complete design service. The agreement paves the way for increased adoption of ARM architecture across a wide range of end markets, such as the use of Cortex-A5 processor in home gateway solutions.”
Analog Devices announces industry’s fastest, 1nV/√Hz, low power, rail-to-rail amplifiers
NORWOOD, USA: Analog Devices Inc. (ADI) unveiled a series of high-speed amplifiers that establish a new performance standard with the best combination of high-speed, low noise and low power.
Designed for portable, multi-channel and low power instrumentation and healthcare equipment, the ADA4896-2 (dual), ADA4897-1 (single) and ADA4897-2 (dual) high-speed amplifiers provide the highest large-signal bandwidth and slew rate with the lowest noise available today in a rail-to-rail amplifier under 10 mW. Each amplifier features low noise of 1 nV/√Hz and 120-V/μs slew rate while consuming only 3 mA of supply current. Further, the 1/f noise @10Hz is a low 2.4 nV/√Hz. Watch this video and learn more about ADI’s new series of high-speed amplifiers.
Also announced as part of this high-speed amplifier series was the ADA4895-2 dual de-compensated high-speed amplifier. It delivers 1.5-GHz gain-bandwidth product at gains of +10 and greater, making it ideal as a high-speed, high-gain pre-amplifier.
The new rail-to-rail amplifiers operate across the extended industrial temperature range of -40˚C to +125˚C and offer a 3-V to 10-V supply range. The ADA4895-2 and ADA4897-1/ -2 include an output disable feature.
Designed for portable, multi-channel and low power instrumentation and healthcare equipment, the ADA4896-2 (dual), ADA4897-1 (single) and ADA4897-2 (dual) high-speed amplifiers provide the highest large-signal bandwidth and slew rate with the lowest noise available today in a rail-to-rail amplifier under 10 mW. Each amplifier features low noise of 1 nV/√Hz and 120-V/μs slew rate while consuming only 3 mA of supply current. Further, the 1/f noise @10Hz is a low 2.4 nV/√Hz. Watch this video and learn more about ADI’s new series of high-speed amplifiers.
Also announced as part of this high-speed amplifier series was the ADA4895-2 dual de-compensated high-speed amplifier. It delivers 1.5-GHz gain-bandwidth product at gains of +10 and greater, making it ideal as a high-speed, high-gain pre-amplifier.
The new rail-to-rail amplifiers operate across the extended industrial temperature range of -40˚C to +125˚C and offer a 3-V to 10-V supply range. The ADA4895-2 and ADA4897-1/ -2 include an output disable feature.
Acacia subsidiary acquires over 50 patents for semiconductor manufacturing processing from major technology company
NEWPORT BEACH, USA: Acacia Research Corp. announced that a subsidiary has acquired over 50 patents relating to semiconductor manufacturing processing technology.
"As Acacia's licensing success grows, an increasing number of major technology companies are selecting us as their partner for the licensing of their patented technologies," commented Paul Ryan, Acacia Chairman and CEO. "Acacia is rapidly becoming the leader in technology licensing and we continue to grow our base of future revenues by adding new patent portfolios," concluded Mr. Ryan.
"As Acacia's licensing success grows, an increasing number of major technology companies are selecting us as their partner for the licensing of their patented technologies," commented Paul Ryan, Acacia Chairman and CEO. "Acacia is rapidly becoming the leader in technology licensing and we continue to grow our base of future revenues by adding new patent portfolios," concluded Mr. Ryan.
DDR3 2GB contract price stays flat for 2HSep., DDR3 4GB dips below $20
TAIWAN: According to DRAMeXchange, a research division of TrendForce, due to an overall increase in spot market price since mid-September, ASP of DDR3 1333Mhz 2Gb chips rose from $1.1 to $1.2, a difference of approximately 9.1 percent. ASP of DDR3 2Gb eTT chips saw an even greater 17 percent increase, arriving at $1.1.
The status of the spot market has affected contract price negotiations for 2HSep., and DDR3 2GB contract price has held onto $10.50 pricing. DDR3 4GB contract price has fallen below the $20 threshold, decreasing by 4.88 percent to $19.50 due to DRAM makers’ actively pushing this density into mainstream specifications.
From the market perspective, since contract price showed signs of stabilization in 1HSep., the spot market looks as if it the downward price trend has nearly bottomed out; consequently, buyers are eager to purchase. Furthermore, with increased demand from China’s upcoming October 1 National Day, the spot market is seeing a fresh wave of inventory replenishment, resulting in a nearly 20 percent increase in spot chip price.
As for contract price, affected by the invigorated spot market, PC OEMs’ relatively low inventory levels, and inventory replenishment in September, DRAM makers kept price quotes flat. DDR3 2GB module price stayed flat, while DDR3 4GB price decreased slightly, as part of DRAM makers’ strategy, in order to stimulate overall shipment volume.
TrendForce expects notebook content per box to gradually increase, arriving at 3.7GB per unit in Q4, a 5.8 percent QoQ increase. As the market currently remains in a state of oversupply, whether or not DRAM price will continue to experience such momentum will depend on future market demand.
Increased demand from ultrabooks and cloud apps, DDR3 4Gb chips may become mainstream in 2012
While DDR3 2Gb chips are the DRAM market mainstream in 2011, with the rise of ultrabooks and cloud applications in 2012, DRAM makers are already expecting strong demand for DDR3 4Gb and have consequently accelerated the transition to the higher density chips. From a product perspective, 11 and 13-inch ultrabook models have a thickness requirement of 18-21 mm.
Thus, due to space limitations makers must transition from SODIMM to on-board modules, and 2Gb chips must be abandoned for 4Gb chips. Furthermore, as PC OEMs are all focusing on ultrabook products for 2012, demand for 4Gb chips will rise markedly. As for cloud applications, although server shipment estimates show steady growth, has an opportunity to experience remarkable growth due to increased demand from cloud applications. RDIMM specifications will gradually transition to 32GB or higher, from the current 8GB and 16GB mainstream.
Demand for 4Gb chips is even stronger from the server market, and as server DRAM products are more profitable, DRAM makers are all fighting to gain footing in this market.
As for DRAM manufacturers’ DDR3 4Gb development schedules, Korean makers are leading the pack as usual. Samsung began mass production in Q2, and Hynix plans to do so at the end of Q4. Since Korean manufacturers have over 60 percent market share in the server segment, early DDR3 4Gb chips will be mainly shipped for server use. Chips for ultrabooks are currently in the qualification stage.
With regard to Japanese makers, Elpida has aggressive ultrabook supply plans, and some models already use Elpida’s DDR3 4Gb chips. Furthermore, as subsidiary Rexchip will enter DDR3 4Gb mass production in Q4, the Japanese team’s capacity will increase significantly in 1H12. Micron has shown steady growth on the server market; the 30nm node process is currently in the testing phase and expected to begin mass production in 1H12. Nanya and Winbond are on the same schedule as Micron.
As all DRAM makers are eagerly transitioning to DDR3 4Gb production, TrendForce expects the higher density chip to become the mainstream specification in 2H12. However, the rate at which manufacturers make the switch and the quality of their chips are key factors that will determine makers’ profitability.
The status of the spot market has affected contract price negotiations for 2HSep., and DDR3 2GB contract price has held onto $10.50 pricing. DDR3 4GB contract price has fallen below the $20 threshold, decreasing by 4.88 percent to $19.50 due to DRAM makers’ actively pushing this density into mainstream specifications.
From the market perspective, since contract price showed signs of stabilization in 1HSep., the spot market looks as if it the downward price trend has nearly bottomed out; consequently, buyers are eager to purchase. Furthermore, with increased demand from China’s upcoming October 1 National Day, the spot market is seeing a fresh wave of inventory replenishment, resulting in a nearly 20 percent increase in spot chip price.
As for contract price, affected by the invigorated spot market, PC OEMs’ relatively low inventory levels, and inventory replenishment in September, DRAM makers kept price quotes flat. DDR3 2GB module price stayed flat, while DDR3 4GB price decreased slightly, as part of DRAM makers’ strategy, in order to stimulate overall shipment volume.
TrendForce expects notebook content per box to gradually increase, arriving at 3.7GB per unit in Q4, a 5.8 percent QoQ increase. As the market currently remains in a state of oversupply, whether or not DRAM price will continue to experience such momentum will depend on future market demand.
Increased demand from ultrabooks and cloud apps, DDR3 4Gb chips may become mainstream in 2012
While DDR3 2Gb chips are the DRAM market mainstream in 2011, with the rise of ultrabooks and cloud applications in 2012, DRAM makers are already expecting strong demand for DDR3 4Gb and have consequently accelerated the transition to the higher density chips. From a product perspective, 11 and 13-inch ultrabook models have a thickness requirement of 18-21 mm.
Thus, due to space limitations makers must transition from SODIMM to on-board modules, and 2Gb chips must be abandoned for 4Gb chips. Furthermore, as PC OEMs are all focusing on ultrabook products for 2012, demand for 4Gb chips will rise markedly. As for cloud applications, although server shipment estimates show steady growth, has an opportunity to experience remarkable growth due to increased demand from cloud applications. RDIMM specifications will gradually transition to 32GB or higher, from the current 8GB and 16GB mainstream.
Demand for 4Gb chips is even stronger from the server market, and as server DRAM products are more profitable, DRAM makers are all fighting to gain footing in this market.
As for DRAM manufacturers’ DDR3 4Gb development schedules, Korean makers are leading the pack as usual. Samsung began mass production in Q2, and Hynix plans to do so at the end of Q4. Since Korean manufacturers have over 60 percent market share in the server segment, early DDR3 4Gb chips will be mainly shipped for server use. Chips for ultrabooks are currently in the qualification stage.
With regard to Japanese makers, Elpida has aggressive ultrabook supply plans, and some models already use Elpida’s DDR3 4Gb chips. Furthermore, as subsidiary Rexchip will enter DDR3 4Gb mass production in Q4, the Japanese team’s capacity will increase significantly in 1H12. Micron has shown steady growth on the server market; the 30nm node process is currently in the testing phase and expected to begin mass production in 1H12. Nanya and Winbond are on the same schedule as Micron.
As all DRAM makers are eagerly transitioning to DDR3 4Gb production, TrendForce expects the higher density chip to become the mainstream specification in 2H12. However, the rate at which manufacturers make the switch and the quality of their chips are key factors that will determine makers’ profitability.
Atmel to acquire ADD Semiconductor
SAN JOSE, USA: Atmel Corp. has signed a definitive agreement to acquire Advanced Digital Design S.A. (ADD Semiconductor), a privately held company based in Zaragoza, Spain that develops power line communication solutions. The transaction is subject to customary closing conditions and is expected to close in October. Atmel does not expect the acquisition to have a material impact on its overall financial position and results of operations in 2011.
ADD Semiconductor, a founding member of the PRIME Alliance, specializes in the design of system-on-chip solutions that allow for narrow-band data communication across existing electric power lines. In addition to successfully supporting a number of advanced meter infrastructure (AMI) pilots in Europe, ADD Semiconductor products are also targeted towards the lighting, building automation and solar infrastructure markets.
With ADD Semiconductor, Atmel will acquire a portfolio of innovative products and a team of technical experts focused on signal processing and power line communications. This acquisition complements Atmel's existing smart energy product portfolio, better positioning the company for continued success in the growing smart meter, energy management, home and building automation markets.
ADD Semiconductor, a founding member of the PRIME Alliance, specializes in the design of system-on-chip solutions that allow for narrow-band data communication across existing electric power lines. In addition to successfully supporting a number of advanced meter infrastructure (AMI) pilots in Europe, ADD Semiconductor products are also targeted towards the lighting, building automation and solar infrastructure markets.
With ADD Semiconductor, Atmel will acquire a portfolio of innovative products and a team of technical experts focused on signal processing and power line communications. This acquisition complements Atmel's existing smart energy product portfolio, better positioning the company for continued success in the growing smart meter, energy management, home and building automation markets.
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