Wednesday, June 8, 2011

Synopsys honors Shrenik Mehta with 11th annual Tenzing Norgay interoperability achievement award

MOUNTAIN VIEW, USA: Synopsys Inc. announced that Shrenik Mehta has been awarded Synopsys' eleventh annual Tenzing Norgay Interoperability Achievement Award. As chairperson of Accellera, a leading standards organization in electronic design automation (EDA), from 2005 until 2010, Shrenik guided the organization to several collaborative initiatives that created widely-used standards such as SystemVerilog, Unified Power Format (UPF), and Universal Verification Methodology (UVM).

"I am deeply honored to accept the Tenzing Norgay Interoperability Achievement Award this year," said Shrenik Mehta, Principal Industry Consultant, @shrenikmehta. "The collaborative industry standards have transformed the system-on-chip (SoC) design methodologies worldwide and enabled designer productivity benefits to semiconductor, systems, IP and EDA companies. I would like to share this award with all the individuals who have contributed to these standards and thank them for their genuine commitment and effort over the years."

"Shrenik was founding board member of Accellera and under his leadership, Accellera became a prominent standards organization," said Rich Goldman, vice president corporate marketing, Synopsys. "In 2009, it merged with The SPIRIT Consortium to form an even stronger organization that looked after creation and adoption of HDL and IP standards."

As a result of Shrenik's efforts, SystemVerilog is currently the most widely-adopted HDL standard in the industry. He also facilitated creation of the Unified Power Format (UPF) committee under Accellera to provide an open and inclusive standard for low-power format, encouraged the user community to participate in this effort, and brought competing vendors together to create a standard that the entire industry can use freely. Shrenik's leadership in providing OpenSPARC, an open source multi-core microprocessor design, has resulted in a very meaningful vehicle for the industry to demonstrate interoperability among many EDA tools and formats.

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