SAN FRANCISCO, USA: Helic Inc., the technology leader in synthesis and verification solutions for RF and high-speed IC design, announced the TSMC RF Reference Design Kit 3.0 (RF RDK) incorporates its EDA products for EM modeling and RF substrate noise coupling analysis.
Helic has contributed to the development of a comprehensive RF RDK 3.0 design flow which now supports electromagnetics (EM) modeling which is compliant with TSMC's dummy fill insertion methodology, leveraging capabilities of Helic's VeloceRF toolset. This allows designers of RF and high-speed custom ICs in TSMC's nanoscale processes to predictably design spiral inductors with improved yield and reduced manufacturing risks.
Additionally, Helic's recently introduced substrate modeling product, which ships as part of its VeloceRaptor/X toolset, provides capabilities for the prediction of RF noise propagation through silicon substrate, thus helping resolve one of the major problems plaguing nanoscale SoC designs.
"Helic is an important vendor in the TSMC ecosystem, bringing unique technology to our analog and mixed-signal design infrastructure, said Suk Lee, director of Design Infrastructure Marketing at TSMC. "Their advanced inductor synthesis and EM modeling solutions ideally complement the TSMC design methodology for high-performance RF design.
"It gives us great pleasure to be a key contributor in the TSMC RF RDK 3.0," said Sotiris Bantas, Helic VP of Technology. "Customers who use the RF RDK 3.0 will have access to a cutting-edge methodology for high-frequency and high-speed nanoscale silicon design. TSMC has qualified our latest solutions for metal-fill-aware EM modeling and substrate noise analysis, using a real silicon vehicle. This brings tremendous value to our mutual customers designing high-performance solutions for wireless and high-speed connectivity markets.
Wednesday, June 1, 2011
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